Subzero. ARM32. Nonsfi.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 336 matching lines @@
       return true;
     }
   }
   return false;
 }
 
 OperandARM32FlexFpImm::OperandARM32FlexFpImm(Cfg * /*Func*/, Type Ty,
                                              uint32_t ModifiedImm)
     : OperandARM32Flex(kFlexFpImm, Ty), ModifiedImm(ModifiedImm) {}
 
-bool OperandARM32FlexFpImm::canHoldImm(Operand *C, uint32_t *ModifiedImm) {
+bool OperandARM32FlexFpImm::canHoldImm(const Operand *C,
+                                       uint32_t *ModifiedImm) {
   switch (C->getType()) {
   default:
     llvm::report_fatal_error("Unhandled fp constant type.");
   case IceType_f32: {
     // We violate llvm naming conventions a bit here so that the constants are
     // named after the bit fields they represent. See "A7.5.1 Operation of
     // modified immediate constants, Floating-point" in the ARM ARM.
     static constexpr uint32_t a = 0x80000000u;
     static constexpr uint32_t B = 0x40000000;
     static constexpr uint32_t bbbbb = 0x3E000000;
     static constexpr uint32_t cdefgh = 0x01F80000;
     static constexpr uint32_t AllowedBits = a | B | bbbbb | cdefgh;
     static_assert(AllowedBits == 0xFFF80000u,
                   "Invalid mask for f32 modified immediates.");
-    const float F32 = llvm::cast<ConstantFloat>(C)->getValue();
+    const float F32 = llvm::cast<const ConstantFloat>(C)->getValue();
     const uint32_t I32 = Utils::bitCopy<uint32_t>(F32);
     if (I32 & ~AllowedBits) {
       // constant has disallowed bits.
       return false;
     }
 
     if ((I32 & bbbbb) != bbbbb && (I32 & bbbbb)) {
       // not all bbbbb bits are 0 or 1.
       return false;
     }
 
     if (((I32 & B) != 0) == ((I32 & bbbbb) != 0)) {
       // B ^ b = 0;
       return false;
     }
 
     *ModifiedImm = ((I32 & a) ? 0x80 : 0x00) | ((I32 & bbbbb) ? 0x40 : 0x00) |
                    ((I32 & cdefgh) >> 19);
     return true;
   }
   case IceType_f64: {
     static constexpr uint32_t a = 0x80000000u;
     static constexpr uint32_t B = 0x40000000;
     static constexpr uint32_t bbbbbbbb = 0x3FC00000;
     static constexpr uint32_t cdefgh = 0x003F0000;
     static constexpr uint32_t AllowedBits = a | B | bbbbbbbb | cdefgh;
     static_assert(AllowedBits == 0xFFFF0000u,
                   "Invalid mask for f64 modified immediates.");
-    const double F64 = llvm::cast<ConstantDouble>(C)->getValue();
+    const double F64 = llvm::cast<const ConstantDouble>(C)->getValue();
     const uint64_t I64 = Utils::bitCopy<uint64_t>(F64);
     if (I64 & 0xFFFFFFFFu) {
       // constant has disallowed bits.
       return false;
     }
     const uint32_t I32 = I64 >> 32;
 
     if (I32 & ~AllowedBits) {
       // constant has disallowed bits.
       return false;
@@ skipping 1265 matching lines @@
   // emitted text size.
   if (auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>())
     Asm->decEmitTextSize(InstSize);
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << getName(Func) << ":";
 }
 
 void InstARM32Label::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   Asm->bindLocalLabel(Func, this, Number);
+  if (OffsetReloc != nullptr) {
+    Asm->bindRelocOffset(OffsetReloc);
+  }
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
 void InstARM32Label::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << getName(Func) << ":";
 }
@@ skipping 119 matching lines @@
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\t" << Opcode << getPredicate() << "\t";
   getDest()->emit(Func);
   Str << ", ";
   auto *Src0 = llvm::cast<Constant>(getSrc(0));
   if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) {
     Str << "#:lower16:";
     CR->emitWithoutPrefix(Func->getTarget());
+    if (Func->getContext()->getFlags().getUseNonsfi()) {
+      Str << " - .";
+    }
   } else {
     Src0->emit(Func);
   }
 }
 
 template <> void InstARM32Movw::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   Asm->movw(getDest(), getSrc(0), getPredicate());
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
 template <> void InstARM32Movt::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Variable *Dest = getDest();
   auto *Src1 = llvm::cast<Constant>(getSrc(1));
   Str << "\t" << Opcode << getPredicate() << "\t";
   Dest->emit(Func);
   Str << ", ";
   if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src1)) {
     Str << "#:upper16:";
     CR->emitWithoutPrefix(Func->getTarget());
+    if (Func->getContext()->getFlags().getUseNonsfi()) {
+      Str << " - .";
+    }
   } else {
     Src1->emit(Func);
   }
 }
 
 template <> void InstARM32Movt::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   Asm->movt(getDest(), getSrc(1), getPredicate());
   if (Asm->needsTextFixup())
@@ skipping 850 matching lines @@
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace ARM32
 } // end of namespace Ice