Subzero. ARM32. Nonsfi.

src/IceTargetLoweringARM32.h

 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Declares the TargetLoweringARM32 class, which implements the
 /// TargetLowering interface for the ARM 32-bit architecture.
 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef SUBZERO_SRC_ICETARGETLOWERINGARM32_H
 #define SUBZERO_SRC_ICETARGETLOWERINGARM32_H
 
 #include "IceAssemblerARM32.h"
 #include "IceDefs.h"
 #include "IceInstARM32.h"
 #include "IceRegistersARM32.h"
 #include "IceTargetLowering.h"
 
 #include "llvm/ADT/SmallBitVector.h"
 
+#include <unordered_set>
+
 namespace Ice {
 namespace ARM32 {
 
 // Class encapsulating ARM cpu features / instruction set.
 class TargetARM32Features {
   TargetARM32Features() = delete;
   TargetARM32Features(const TargetARM32Features &) = delete;
   TargetARM32Features &operator=(const TargetARM32Features &) = delete;
 
 public:
@@ skipping 20 matching lines @@
   TargetARM32 &operator=(const TargetARM32 &) = delete;
 
 public:
   static void staticInit(GlobalContext *Ctx);
   // TODO(jvoung): return a unique_ptr.
   static std::unique_ptr<::Ice::TargetLowering> create(Cfg *Func) {
     return makeUnique<TargetARM32>(Func);
   }
 
   std::unique_ptr<::Ice::Assembler> createAssembler() const override {
-    return makeUnique<ARM32::AssemblerARM32>();
+    const bool IsNonsfi = SandboxingType == ST_Nonsfi;
+    return makeUnique<ARM32::AssemblerARM32>(IsNonsfi);
   }
 
   void initNodeForLowering(CfgNode *Node) override {
     Computations.forgetProducers();
     Computations.recordProducers(Node);
     Computations.dump(Func);
   }
 
   void translateOm1() override;
   void translateO2() override;
@@ skipping 767 matching lines @@
   // TODO(jpp): This could live in the Parser, if we provided a Target-specific
   // method that the Parser could call.
   void findMaxStackOutArgsSize();
 
   /// Returns true if the given Offset can be represented in a Load/Store Mem
   /// Operand.
   bool isLegalMemOffset(Type Ty, int32_t Offset) const;
 
   void postLowerLegalization();
 
+  /// Manages the GotPtr variable, which is used for Nonsfi sandboxing.
+  /// @{
+  void createGotPtr();
+  void initGotPtr();
+  VariableDeclaration *createGotRelocation(RelocOffset *AddPcReloc);
+  void materializeGotAddr(CfgNode *Node);
+  Variable *GotPtr = nullptr;
+  // TODO(jpp): use CfgLocalAllocator.
+  /// @}
+
+  /// Manages the Gotoff relocations created during the function lowering. A
+  /// single Gotoff relocation is created for each global variable used by the
+  /// function being lowered.
+  /// @{
+  // TODO(jpp): if the same global G is used in different functions, then this
+  // method will emit one G(gotoff) relocation per function.
+  IceString createGotoffRelocation(const ConstantRelocatable *CR);
+  std::unordered_set<IceString> KnownGotoffs;
+  /// @}
+
+  /// Loads the constant relocatable Name to Register. Then invoke Finish to
+  /// finish the relocatable lowering. Finish **must** use PC in its first
+  /// emitted instruction, or the relocatable in Register will contain the wrong
+  /// value.
+  //
+  // Lowered sequence:
+  //
+  // Movw:
+  //     movw Register, #:lower16:Name - (End - Movw) - 8 .
+  // Movt:
+  //     movt Register, #:upper16:Name - (End - Movt) - 8 .
+  //     PC = fake-def
+  // End:
+  //     Finish(PC)
+  //
+  // The -8 in movw/movt above is to account for the PC value that the first
+  // instruction emitted by Finish(PC) will read.
+  void loadNamedConstantRelocatablePIC(const IceString &Name,
+                                       Variable *Register,
+                                       std::function<void(Variable *PC)> Finish,
+                                       bool SuppressMangling = true);
+
   /// Sandboxer defines methods for ensuring that "dangerous" operations are
   /// masked during sandboxed code emission. For regular, non-sandboxed code
   /// emission, its methods are simple pass-through methods.
   ///
   /// The Sandboxer also emits BundleLock/BundleUnlock pseudo-instructions
   /// in the constructor/destructor during sandboxed code emission. Therefore,
   /// it is a bad idea to create an object of this type and "keep it around."
   /// The recommended usage is:
   ///
   /// AutoSandboxing(this).<<operation>>(...);
@@ skipping 371 matching lines @@
 private:
   ~TargetHeaderARM32() = default;
 
   TargetARM32Features CPUFeatures;
 };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H