Subzero: Prototype to simplify makereg calls

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 581 matching lines @@
   Variable *Src0LoR = legalizeToReg(loOperand(Src0));
   Variable *Src1LoR = legalizeToReg(loOperand(Src1));
   Variable *Src0HiR = legalizeToReg(hiOperand(Src0));
   Variable *Src1HiR = legalizeToReg(hiOperand(Src1));
 
   switch (Op) {
   case InstArithmetic::_num:
     llvm::report_fatal_error("Unknown arithmetic operator");
     return;
   case InstArithmetic::Add: {
-    Variable *T_Carry = makeReg(IceType_i32);
-    Variable *T_Lo = makeReg(IceType_i32);
-    Variable *T_Hi = makeReg(IceType_i32);
-    Variable *T_Hi2 = makeReg(IceType_i32);
+    auto *T_Carry = I32Reg(), *T_Lo = I32Reg(), *T_Hi = I32Reg(),
+         *T_Hi2 = I32Reg();
     _addu(T_Lo, Src0LoR, Src1LoR);
     _mov(DestLo, T_Lo);
     _sltu(T_Carry, T_Lo, Src0LoR);
     _addu(T_Hi, T_Carry, Src0HiR);
     _addu(T_Hi2, Src1HiR, T_Hi);
     _mov(DestHi, T_Hi2);
     return;
   }
   case InstArithmetic::And: {
-    Variable *T_Lo = makeReg(IceType_i32);
-    Variable *T_Hi = makeReg(IceType_i32);
+    auto *T_Lo = I32Reg(), *T_Hi = I32Reg();
     _and(T_Lo, Src0LoR, Src1LoR);
     _mov(DestLo, T_Lo);
     _and(T_Hi, Src0HiR, Src1HiR);
     _mov(DestHi, T_Hi);
     return;
   }
   case InstArithmetic::Sub: {
-    Variable *T_Borrow = makeReg(IceType_i32);
-    Variable *T_Lo = makeReg(IceType_i32);
-    Variable *T_Hi = makeReg(IceType_i32);
-    Variable *T_Hi2 = makeReg(IceType_i32);
+    auto *T_Borrow = I32Reg(), *T_Lo = I32Reg(), *T_Hi = I32Reg(),
+         *T_Hi2 = I32Reg();
     _subu(T_Lo, Src0LoR, Src1LoR);
     _mov(DestLo, T_Lo);
     _sltu(T_Borrow, Src0LoR, Src1LoR);
     _addu(T_Hi, T_Borrow, Src1HiR);
     _subu(T_Hi2, Src0HiR, T_Hi);
     _mov(DestHi, T_Hi2);
     return;
   }
   case InstArithmetic::Or: {
-    Variable *T_Lo = makeReg(IceType_i32);
-    Variable *T_Hi = makeReg(IceType_i32);
+    auto *T_Lo = I32Reg(), *T_Hi = I32Reg();
     _or(T_Lo, Src0LoR, Src1LoR);
     _mov(DestLo, T_Lo);
     _or(T_Hi, Src0HiR, Src1HiR);
     _mov(DestHi, T_Hi);
     return;
   }
   case InstArithmetic::Xor: {
-    Variable *T_Lo = makeReg(IceType_i32);
-    Variable *T_Hi = makeReg(IceType_i32);
+    auto *T_Lo = I32Reg(), *T_Hi = I32Reg();
     _xor(T_Lo, Src0LoR, Src1LoR);
     _mov(DestLo, T_Lo);
     _xor(T_Hi, Src0HiR, Src1HiR);
     _mov(DestHi, T_Hi);
     return;
   }
   default:
     UnimplementedLoweringError(this, Instr);
     return;
   }
@@ skipping 100 matching lines @@
   Variable *Dest = Instr->getDest();
   Operand *Src0 = Instr->getSrc(0);
   assert(Dest->getType() == Src0->getType());
   if (Dest->getType() == IceType_i64) {
     Src0 = legalizeUndef(Src0);
     Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg);
     Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg);
     auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
     auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
     // Variable *T_Lo = nullptr, *T_Hi = nullptr;
-    Variable *T_Lo = makeReg(IceType_i32);
-    Variable *T_Hi = makeReg(IceType_i32);
+    auto *T_Lo = I32Reg(), *T_Hi = I32Reg();
     _mov(T_Lo, Src0Lo);
     _mov(DestLo, T_Lo);
     _mov(T_Hi, Src0Hi);
     _mov(DestHi, T_Hi);
   } else {
     Operand *SrcR;
     if (Dest->hasReg()) {
       // If Dest already has a physical register, then legalize the Src operand
       // into a Variable with the same register assignment.  This especially
       // helps allow the use of Flex operands.
@@ skipping 35 matching lines @@
       return;
     case IceType_void:
       break;
     case IceType_i1:
     case IceType_i8:
     case IceType_i16:
     case IceType_i32:
       ReturnReg = makeReg(Dest->getType(), RegMIPS32::Reg_V0);
       break;
     case IceType_i64:
-      ReturnReg = makeReg(IceType_i32, RegMIPS32::Reg_V0);
-      ReturnRegHi = makeReg(IceType_i32, RegMIPS32::Reg_V1);
+      ReturnReg = I32Reg(RegMIPS32::Reg_V0);
+      ReturnRegHi = I32Reg(RegMIPS32::Reg_V1);
       break;
     case IceType_f32:
     case IceType_f64:
       UnimplementedLoweringError(this, Instr);
       return;
     case IceType_v4i1:
     case IceType_v8i1:
     case IceType_v16i1:
     case IceType_v16i8:
     case IceType_v8i16:
@@ skipping 463 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice