Reland of MIPS: Add FPXX support to MIPS32R2

Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original issue's description:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
>
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}

BUG=

Committed: https://crrev.com/b23d5389e024a85cdc5c7d343fe5cc68a14f4d49
Cr-Commit-Position: refs/heads/master@{#33808}

[ivica.bogosavljevic, 2016-02-04 11:26:07]

Description was changed from

==========
Reland of MIPS: Add FPXX support to MIPS32R2

BUG=
==========

to

==========
Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete 
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original commit message:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
> 
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}


BUG=
==========

[ivica.bogosavljevic, 2016-02-04 11:26:26]

Description was changed from

==========
Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete 
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original commit message:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
> 
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}


BUG=
==========

to

==========
Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete 
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original issue's description:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
> 
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}


BUG=
==========

[ivica.bogosavljevic, 2016-02-04 11:27:28]

ivica.bogosavljevic@imgtec.com changed reviewers:
+ akos.palfi@imgtec.com, balazs.kilvady@imgtec.com, gergely.kis@imgtec.com,
ilija.pavlovic@imgtec.com, marija.antic@imgtec.com, miran.karic@imgtec.com

[ivica.bogosavljevic, 2016-02-04 11:27:28]

PTAL

[Ilija.Pavlovic1, 2016-02-04 13:03:42]

ilija.pavlovic@imgtec.com changed reviewers:
+ Ilija.Pavlovic@imgtec.com

[Ilija.Pavlovic1, 2016-02-04 13:03:43]

The patch seems to me OK.

[akos.palfi.imgtec, 2016-02-04 16:30:21]

akos.palfi@imgtec.com changed reviewers:
- Ilija.Pavlovic@imgtec.com

[akos.palfi.imgtec, 2016-02-04 16:30:22]

Lgtm

[ivica.bogosavljevic, 2016-02-08 09:10:26]

The CQ bit was checked by ivica.bogosavljevic@imgtec.com to run a CQ dry run

[commit-bot: I haz the power, 2016-02-08 09:10:33]

Dry run: CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1659883002/40001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1659883002/40001

[commit-bot: I haz the power, 2016-02-08 09:28:43]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-02-08 09:28:44]

Dry run: This issue passed the CQ dry run.

[ivica.bogosavljevic, 2016-02-08 09:41:46]

The CQ bit was unchecked by ivica.bogosavljevic@imgtec.com

[ivica.bogosavljevic, 2016-02-08 09:42:31]

The CQ bit was checked by ivica.bogosavljevic@imgtec.com

[commit-bot: I haz the power, 2016-02-08 09:42:42]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1659883002/40001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1659883002/40001

[commit-bot: I haz the power, 2016-02-08 09:44:05]

Description was changed from

==========
Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete 
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original issue's description:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
> 
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}


BUG=
==========

to

==========
Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete 
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original issue's description:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
> 
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}


BUG=
==========

[commit-bot: I haz the power, 2016-02-08 09:44:05]

Committed patchset #3 (id:40001)

[commit-bot: I haz the power, 2016-02-08 09:44:25]

Description was changed from

==========
Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete 
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original issue's description:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
> 
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}


BUG=
==========

to

==========
Reland of MIPS: Add FPXX support to MIPS32R2

Fix failures on MIPS simulator because incomplete
handling of MTHC1 and MFHC1 in Fp32 mode
Fix failures on older kernels that have problems with
MTHC1 and MFHC1 in kernel FPU emulation

Original issue's description:
> Revert of MIPS: Add FPXX support to MIPS32R2 (patchset #3
> id:40001 of https://codereview.chromium.org/1586223004/ )
>
> Reason for revert:
> Revert patch due to a number of failures appearing on the > MIPS v8 simulator
>
> Original issue's description:
>> MIPS: Add FPXX support to MIPS32R2
>>
>> The JIT code generated by V8 is FPXX compliant
>> when v8 compiled with FPXX flag. This allows the code to
>> run in both FP=1 and FP=0 mode. It also alows v8 to be used
>> as a library by both FP32 and FP64 binaries.
>>
>> BUG=
>>
>> Committed: https://crrev.com/95110dde666158a230a823fd50a68558ad772320
>> Cr-Commit-Position: refs/heads/master@{#33576}

BUG=

Committed: https://crrev.com/b23d5389e024a85cdc5c7d343fe5cc68a14f4d49
Cr-Commit-Position: refs/heads/master@{#33808}
==========

[commit-bot: I haz the power, 2016-02-08 09:44:25]

Patchset 3 (id:??) landed as
https://crrev.com/b23d5389e024a85cdc5c7d343fe5cc68a14f4d49
Cr-Commit-Position: refs/heads/master@{#33808}