| Index: src/IceAssemblerARM32.cpp
|
| diff --git a/src/IceAssemblerARM32.cpp b/src/IceAssemblerARM32.cpp
|
| index 22fe5a3c4a6ed080bb93f81cb2acbb70e9f200e2..b7e74d913362bfda619bb7aa003a162e2db6530e 100644
|
| --- a/src/IceAssemblerARM32.cpp
|
| +++ b/src/IceAssemblerARM32.cpp
|
| @@ -2188,6 +2188,18 @@ void AssemblerARM32::vaddd(const Operand *OpDd, const Operand *OpDn,
|
| emitVFPddd(Cond, VadddOpcode, OpDd, OpDn, OpDm, Vaddd);
|
| }
|
|
|
| +void AssemblerARM32::vandq(const Operand *OpQd, const Operand *OpQm,
|
| + const Operand *OpQn) {
|
| + // VAND (register) - ARM section A8.8.287, encoding A1:
|
| + // vand.<dt> <Qd>, <Qn>, <Qm>
|
| + //
|
| + // 111100100D00nnn0ddd00001N1M1mmm0 where Dddd=OpQd, Nnnn=OpQm, and Mmmm=OpQm.
|
| + constexpr const char *Vandqi = "vandqi";
|
| + constexpr IValueT VandqiOpcode = B8 | B4;
|
| + constexpr Type ElmtTy = IceType_i8;
|
| + emitSIMDqqq(VandqiOpcode, ElmtTy, OpQd, OpQm, OpQn, Vandqi);
|
| +}
|
| +
|
| void AssemblerARM32::vcmpd(const Operand *OpDd, const Operand *OpDm,
|
| CondARM32::Cond Cond) {
|
| constexpr const char *Vcmpd = "vcmpd";
|
|
|