Sample code: IPC Transport object for GPU

content/common/gpu/client/ipc/gpu_channel_host_ipc_transport.h

+// Copyright 2015 The Chromium Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef CONTENT_COMMON_GPU_CLIENT_GPU_CHANNEL_HOST_IPC_TRANSPORT_H_
+#define CONTENT_COMMON_GPU_CLIENT_GPU_CHANNEL_HOST_IPC_TRANSPORT_H_
+
+#include <stdint.h>
+
+#include <vector>
+
+#include "base/memory/shared_memory_handle.h"
+#include "content/common/gpu/gpu_result_codes.h"
+#include "ui/events/latency_info.h"
+
+namespace gfx {
+class Size;
+}
+
+namespace content {
+
+class CommandBufferIPCTransport;
+class GpuJpegDecodeAcceleratorHostIPCTransport;
+struct GpuCreateCommandBufferConfig;
+
+class GpuChannelHostIPCTransport {
+ public:
+  virtual ~GpuChannelHostIPCTransport() {}
+
+  virtual bool AsyncFlush(CommandBufferIPCTransport* transport,
+                          int32_t put_offset,
+                          uint32_t flush_count,
+                          const std::vector<ui::LatencyInfo>& latency_info) = 0;
+
+  virtual bool CreateJpegDecoder(
+      GpuJpegDecodeAcceleratorHostIPCTransport* jpeg_decode_transport,
+      bool* succeeded) = 0;
+
+  virtual bool CreateViewCommandBuffer(
+      uint32_t surface_id,
+      const GpuCreateCommandBufferConfig& init_params,
+      CommandBufferIPCTransport* command_buffer_transport,
+      CreateCommandBufferResult* result) = 0;
+
+  virtual bool CreateOffscreenCommandBuffer(
+      const gfx::Size& size,
+      const GpuCreateCommandBufferConfig& init_params,
+      CommandBufferIPCTransport* command_buffer_transport,
+      bool* succeeded) = 0;
+
+  virtual bool DestroyCommandBuffer(
+      CommandBufferIPCTransport* command_buffer_transport) = 0;
+
+  virtual bool IsLost() const = 0;
+
+  // TODO(fsamuel): This is not currently Mojo compatible.
+  virtual base::SharedMemoryHandle ShareToGpuProcess(
+      const base::SharedMemoryHandle& source_handle) = 0;
+
+  virtual bool Nop() = 0;
+};
+
+}  // namespace content
+
+#endif  // CONTENT_COMMON_GPU_GPU_CHANNEL_HOST_IPC_TRANSPORT_H_