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Side by Side Diff: src/IceInstARM32.h

Issue 1655313002: Subzero: ARM32: lowering of vector insert and extract. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Removing incorrect use of rematerializable check" Created 4 years, 10 months ago
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1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
11 /// \brief Declares the InstARM32 and OperandARM32 classes and their subclasses. 11 /// \brief Declares the InstARM32 and OperandARM32 classes and their subclasses.
12 /// 12 ///
13 /// This represents the machine instructions and operands used for ARM32 code 13 /// This represents the machine instructions and operands used for ARM32 code
14 /// selection. 14 /// selection.
15 /// 15 ///
16 //===----------------------------------------------------------------------===// 16 //===----------------------------------------------------------------------===//
17 17
18 #ifndef SUBZERO_SRC_ICEINSTARM32_H 18 #ifndef SUBZERO_SRC_ICEINSTARM32_H
19 #define SUBZERO_SRC_ICEINSTARM32_H 19 #define SUBZERO_SRC_ICEINSTARM32_H
20 20
21 #include "IceConditionCodesARM32.h" 21 #include "IceConditionCodesARM32.h"
22 #include "IceDefs.h" 22 #include "IceDefs.h"
23 #include "IceInst.h" 23 #include "IceInst.h"
24 #include "IceInstARM32.def" 24 #include "IceInstARM32.def"
25 #include "IceOperand.h" 25 #include "IceOperand.h"
26 #include "IceRegistersARM32.h"
26 27
27 namespace Ice { 28 namespace Ice {
28 namespace ARM32 { 29 namespace ARM32 {
29 30
30 /// Encoding of an ARM 32-bit instruction. 31 /// Encoding of an ARM 32-bit instruction.
31 using IValueT = uint32_t; 32 using IValueT = uint32_t;
32 33
33 /// An Offset value (+/-) used in an ARM 32-bit instruction. 34 /// An Offset value (+/-) used in an ARM 32-bit instruction.
34 using IOffsetT = int32_t; 35 using IOffsetT = int32_t;
35 36
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382 And, 383 And,
383 Asr, 384 Asr,
384 Bic, 385 Bic,
385 Br, 386 Br,
386 Call, 387 Call,
387 Clz, 388 Clz,
388 Cmn, 389 Cmn,
389 Cmp, 390 Cmp,
390 Dmb, 391 Dmb,
391 Eor, 392 Eor,
393 Extract,
394 Insert,
392 Label, 395 Label,
393 Ldr, 396 Ldr,
394 Ldrex, 397 Ldrex,
395 Lsl, 398 Lsl,
396 Lsr, 399 Lsr,
397 Mla, 400 Mla,
398 Mls, 401 Mls,
399 Mov, 402 Mov,
400 Movt, 403 Movt,
401 Movw, 404 Movw,
(...skipping 944 matching lines...) Expand 10 before | Expand all | Expand 10 after
1346 void emitSingleDestMultiSource(const Cfg *Func) const; 1349 void emitSingleDestMultiSource(const Cfg *Func) const;
1347 void emitSingleDestSingleSource(const Cfg *Func) const; 1350 void emitSingleDestSingleSource(const Cfg *Func) const;
1348 1351
1349 void emitIASSingleDestSingleSource(const Cfg *Func) const; 1352 void emitIASSingleDestSingleSource(const Cfg *Func) const;
1350 void emitIASScalarVFPMove(const Cfg *Func) const; 1353 void emitIASScalarVFPMove(const Cfg *Func) const;
1351 void emitIASCoreVFPMove(const Cfg *Func) const; 1354 void emitIASCoreVFPMove(const Cfg *Func) const;
1352 1355
1353 Variable *DestHi = nullptr; 1356 Variable *DestHi = nullptr;
1354 }; 1357 };
1355 1358
1359 /// Generates vmov Rd, Dn[x] instructions, and their related floating point
1360 /// versions.
1361 class InstARM32Extract final : public InstARM32Pred {
1362 InstARM32Extract() = delete;
1363 InstARM32Extract(const InstARM32Extract &) = delete;
1364 InstARM32Extract &operator=(const InstARM32Extract &) = delete;
1365
1366 public:
1367 static InstARM32Extract *create(Cfg *Func, Variable *Dest, Variable *Src0,
1368 uint32_t Index, CondARM32::Cond Predicate) {
1369 return new (Func->allocate<InstARM32Extract>())
1370 InstARM32Extract(Func, Dest, Src0, Index, Predicate);
1371 }
1372 void emit(const Cfg *Func) const override;
1373 static bool classof(const Inst *Inst) { return isClassof(Inst, Extract); }
1374
1375 private:
1376 InstARM32Extract(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index,
1377 CondARM32::Cond Predicate)
1378 : InstARM32Pred(Func, InstARM32::Extract, 1, Dest, Predicate),
1379 Index(Index) {
1380 addSource(Src0);
1381 }
1382
1383 const uint32_t Index;
1384 };
1385
1386 /// Generates vmov Dn[x], Rd instructions, and their related floating point
1387 /// versions.
1388 class InstARM32Insert final : public InstARM32Pred {
1389 InstARM32Insert() = delete;
1390 InstARM32Insert(const InstARM32Insert &) = delete;
1391 InstARM32Insert &operator=(const InstARM32Insert &) = delete;
1392
1393 public:
1394 static InstARM32Insert *create(Cfg *Func, Variable *Dest, Variable *Src0,
1395 uint32_t Index, CondARM32::Cond Predicate) {
1396 return new (Func->allocate<InstARM32Insert>())
1397 InstARM32Insert(Func, Dest, Src0, Index, Predicate);
1398 }
1399 void emit(const Cfg *Func) const override;
1400 static bool classof(const Inst *Inst) { return isClassof(Inst, Insert); }
1401
1402 private:
1403 InstARM32Insert(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index,
1404 CondARM32::Cond Predicate)
1405 : InstARM32Pred(Func, InstARM32::Insert, 1, Dest, Predicate),
1406 Index(Index) {
1407 addSource(Src0);
1408 }
1409
1410 const uint32_t Index;
1411 };
1412
1356 class InstARM32Vcmp final : public InstARM32Pred { 1413 class InstARM32Vcmp final : public InstARM32Pred {
1357 InstARM32Vcmp() = delete; 1414 InstARM32Vcmp() = delete;
1358 InstARM32Vcmp(const InstARM32Vcmp &) = delete; 1415 InstARM32Vcmp(const InstARM32Vcmp &) = delete;
1359 InstARM32Vcmp &operator=(const InstARM32Vcmp &) = delete; 1416 InstARM32Vcmp &operator=(const InstARM32Vcmp &) = delete;
1360 1417
1361 public: 1418 public:
1362 static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, Variable *Src1, 1419 static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, Variable *Src1,
1363 CondARM32::Cond Predicate) { 1420 CondARM32::Cond Predicate) {
1364 return new (Func->allocate<InstARM32Vcmp>()) 1421 return new (Func->allocate<InstARM32Vcmp>())
1365 InstARM32Vcmp(Func, Src0, Src1, Predicate); 1422 InstARM32Vcmp(Func, Src0, Src1, Predicate);
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1442 // violations and link errors. 1499 // violations and link errors.
1443 1500
1444 template <> void InstARM32Ldr::emit(const Cfg *Func) const; 1501 template <> void InstARM32Ldr::emit(const Cfg *Func) const;
1445 template <> void InstARM32Movw::emit(const Cfg *Func) const; 1502 template <> void InstARM32Movw::emit(const Cfg *Func) const;
1446 template <> void InstARM32Movt::emit(const Cfg *Func) const; 1503 template <> void InstARM32Movt::emit(const Cfg *Func) const;
1447 1504
1448 } // end of namespace ARM32 1505 } // end of namespace ARM32
1449 } // end of namespace Ice 1506 } // end of namespace Ice
1450 1507
1451 #endif // SUBZERO_SRC_ICEINSTARM32_H 1508 #endif // SUBZERO_SRC_ICEINSTARM32_H
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