Subzero: ARM32: lowering of vector insert and extract.

src/IceInstARM32.h

 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Declares the InstARM32 and OperandARM32 classes and their subclasses.
 ///
 /// This represents the machine instructions and operands used for ARM32 code
 /// selection.
 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef SUBZERO_SRC_ICEINSTARM32_H
 #define SUBZERO_SRC_ICEINSTARM32_H
 
 #include "IceConditionCodesARM32.h"
 #include "IceDefs.h"
 #include "IceInst.h"
 #include "IceInstARM32.def"
 #include "IceOperand.h"
+#include "IceRegistersARM32.h"
 
 namespace Ice {
 namespace ARM32 {
 
 /// Encoding of an ARM 32-bit instruction.
 using IValueT = uint32_t;
 
 /// An Offset value (+/-) used in an ARM 32-bit instruction.
 using IOffsetT = int32_t;
 
@@ skipping 346 matching lines @@
     And,
     Asr,
     Bic,
     Br,
     Call,
     Clz,
     Cmn,
     Cmp,
     Dmb,
     Eor,
+    Extract,
+    Insert,
     Label,
     Ldr,
     Ldrex,
     Lsl,
     Lsr,
     Mla,
     Mls,
     Mov,
     Movt,
     Movw,
@@ skipping 944 matching lines @@
   void emitSingleDestMultiSource(const Cfg *Func) const;
   void emitSingleDestSingleSource(const Cfg *Func) const;
 
   void emitIASSingleDestSingleSource(const Cfg *Func) const;
   void emitIASScalarVFPMove(const Cfg *Func) const;
   void emitIASCoreVFPMove(const Cfg *Func) const;
 
   Variable *DestHi = nullptr;
 };
 
+/// Common methods between InstARM32Extract and InstARM32Insert.
+class InstARM32ExtractInsert : public InstARM32Pred {
+  InstARM32ExtractInsert() = delete;
+  InstARM32ExtractInsert(const InstARM32ExtractInsert &) = delete;
+  InstARM32ExtractInsert &operator=(const InstARM32ExtractInsert &) = delete;
+
+protected:
+  InstARM32ExtractInsert(Cfg *Func, Variable *Dest, Variable *Src0,
+                         uint32_t Index, CondARM32::Cond Predicate)
+      : InstARM32Pred(Func, InstARM32::Extract, 1, Dest, Predicate),
+        Index(Index) {
+    addSource(Src0);
+  }
+
+  const uint32_t Index;
+
+  // These next two functions find the D register that maps to the half of the Q
+  // register that this instruction is accessing.
+  RegARM32::AllRegisters getDRegister(const Variable *Src) const;
+  uint32_t getDIndex(uint32_t NumElements) const;
+
+  // For floating point values, we can read directly from an S register. This

[John, 2016/02/04 15:23:57]

read/write ... from/to?

+  // function finds the right one.
+  RegARM32::AllRegisters getSRegister(const Variable *Src) const;
+
+  static bool classof(const Inst *Inst) { return isClassof(Inst, Insert); }
+};
+
+/// Generates vmov Rd, Dn[x] instructions, and their related floating point
+/// versions.
+class InstARM32Extract final : public InstARM32ExtractInsert {
+  InstARM32Extract() = delete;
+  InstARM32Extract(const InstARM32Extract &) = delete;
+  InstARM32Extract &operator=(const InstARM32Extract &) = delete;
+
+public:
+  static InstARM32Extract *create(Cfg *Func, Variable *Dest, Variable *Src0,
+                                  uint32_t Index, CondARM32::Cond Predicate) {
+    return new (Func->allocate<InstARM32Extract>())
+        InstARM32Extract(Func, Dest, Src0, Index, Predicate);
+  }
+  void emit(const Cfg *Func) const override;
+  static bool classof(const Inst *Inst) { return isClassof(Inst, Extract); }
+
+private:
+  InstARM32Extract(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index,
+                   CondARM32::Cond Predicate)
+      : InstARM32ExtractInsert(Func, Dest, Src0, Index, Predicate) {}
+};
+
+/// Generates vmov Dn[x], Rd instructions, and their related floating point
+/// versions.
+class InstARM32Insert final : public InstARM32ExtractInsert {
+  InstARM32Insert() = delete;
+  InstARM32Insert(const InstARM32Insert &) = delete;
+  InstARM32Insert &operator=(const InstARM32Insert &) = delete;
+
+public:
+  static InstARM32Insert *create(Cfg *Func, Variable *Dest, Variable *Src0,
+                                 uint32_t Index, CondARM32::Cond Predicate) {
+    return new (Func->allocate<InstARM32Insert>())
+        InstARM32Insert(Func, Dest, Src0, Index, Predicate);
+  }
+  void emit(const Cfg *Func) const override;
+  static bool classof(const Inst *Inst) { return isClassof(Inst, Insert); }
+
+private:
+  InstARM32Insert(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index,
+                  CondARM32::Cond Predicate)
+      : InstARM32ExtractInsert(Func, Dest, Src0, Index, Predicate) {}
+};
+
 class InstARM32Vcmp final : public InstARM32Pred {
   InstARM32Vcmp() = delete;
   InstARM32Vcmp(const InstARM32Vcmp &) = delete;
   InstARM32Vcmp &operator=(const InstARM32Vcmp &) = delete;
 
 public:
   static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, Variable *Src1,
                                CondARM32::Cond Predicate) {
     return new (Func->allocate<InstARM32Vcmp>())
         InstARM32Vcmp(Func, Src0, Src1, Predicate);
@@ skipping 76 matching lines @@
 // violations and link errors.
 
 template <> void InstARM32Ldr::emit(const Cfg *Func) const;
 template <> void InstARM32Movw::emit(const Cfg *Func) const;
 template <> void InstARM32Movt::emit(const Cfg *Func) const;
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTARM32_H