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| 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// | 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| 11 /// \brief Declares the InstARM32 and OperandARM32 classes and their subclasses. | 11 /// \brief Declares the InstARM32 and OperandARM32 classes and their subclasses. |
| 12 /// | 12 /// |
| 13 /// This represents the machine instructions and operands used for ARM32 code | 13 /// This represents the machine instructions and operands used for ARM32 code |
| 14 /// selection. | 14 /// selection. |
| 15 /// | 15 /// |
| 16 //===----------------------------------------------------------------------===// | 16 //===----------------------------------------------------------------------===// |
| 17 | 17 |
| 18 #ifndef SUBZERO_SRC_ICEINSTARM32_H | 18 #ifndef SUBZERO_SRC_ICEINSTARM32_H |
| 19 #define SUBZERO_SRC_ICEINSTARM32_H | 19 #define SUBZERO_SRC_ICEINSTARM32_H |
| 20 | 20 |
| 21 #include "IceConditionCodesARM32.h" | 21 #include "IceConditionCodesARM32.h" |
| 22 #include "IceDefs.h" | 22 #include "IceDefs.h" |
| 23 #include "IceInst.h" | 23 #include "IceInst.h" |
| 24 #include "IceInstARM32.def" | 24 #include "IceInstARM32.def" |
| 25 #include "IceOperand.h" | 25 #include "IceOperand.h" |
| 26 #include "IceRegistersARM32.h" | |
| 26 | 27 |
| 27 namespace Ice { | 28 namespace Ice { |
| 28 namespace ARM32 { | 29 namespace ARM32 { |
| 29 | 30 |
| 30 /// Encoding of an ARM 32-bit instruction. | 31 /// Encoding of an ARM 32-bit instruction. |
| 31 using IValueT = uint32_t; | 32 using IValueT = uint32_t; |
| 32 | 33 |
| 33 /// An Offset value (+/-) used in an ARM 32-bit instruction. | 34 /// An Offset value (+/-) used in an ARM 32-bit instruction. |
| 34 using IOffsetT = int32_t; | 35 using IOffsetT = int32_t; |
| 35 | 36 |
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| 382 And, | 383 And, |
| 383 Asr, | 384 Asr, |
| 384 Bic, | 385 Bic, |
| 385 Br, | 386 Br, |
| 386 Call, | 387 Call, |
| 387 Clz, | 388 Clz, |
| 388 Cmn, | 389 Cmn, |
| 389 Cmp, | 390 Cmp, |
| 390 Dmb, | 391 Dmb, |
| 391 Eor, | 392 Eor, |
| 393 Extract, | |
| 394 Insert, | |
| 392 Label, | 395 Label, |
| 393 Ldr, | 396 Ldr, |
| 394 Ldrex, | 397 Ldrex, |
| 395 Lsl, | 398 Lsl, |
| 396 Lsr, | 399 Lsr, |
| 397 Mla, | 400 Mla, |
| 398 Mls, | 401 Mls, |
| 399 Mov, | 402 Mov, |
| 400 Movt, | 403 Movt, |
| 401 Movw, | 404 Movw, |
| (...skipping 940 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 1342 private: | 1345 private: |
| 1343 InstARM32Mov(Cfg *Func, Variable *Dest, Operand *Src, | 1346 InstARM32Mov(Cfg *Func, Variable *Dest, Operand *Src, |
| 1344 CondARM32::Cond Predicate); | 1347 CondARM32::Cond Predicate); |
| 1345 void emitMultiDestSingleSource(const Cfg *Func) const; | 1348 void emitMultiDestSingleSource(const Cfg *Func) const; |
| 1346 void emitSingleDestMultiSource(const Cfg *Func) const; | 1349 void emitSingleDestMultiSource(const Cfg *Func) const; |
| 1347 void emitSingleDestSingleSource(const Cfg *Func) const; | 1350 void emitSingleDestSingleSource(const Cfg *Func) const; |
| 1348 | 1351 |
| 1349 Variable *DestHi = nullptr; | 1352 Variable *DestHi = nullptr; |
| 1350 }; | 1353 }; |
| 1351 | 1354 |
| 1355 /// Generates vmov Rd, Dn[x] instructions, and their related floating point | |
| 1356 /// versions. | |
| 1357 class InstARM32Extract final : public InstARM32Pred { | |
| 1358 InstARM32Extract() = delete; | |
| 1359 InstARM32Extract(const InstARM32Extract &) = delete; | |
| 1360 InstARM32Extract &operator=(const InstARM32Extract &) = delete; | |
| 1361 | |
| 1362 public: | |
| 1363 static InstARM32Extract *create(Cfg *Func, Variable *Dest, Variable *Src0, | |
| 1364 uint32_t Index, CondARM32::Cond Predicate) { | |
| 1365 return new (Func->allocate<InstARM32Extract>()) | |
| 1366 InstARM32Extract(Func, Dest, Src0, Index, Predicate); | |
| 1367 } | |
| 1368 void emit(const Cfg *Func) const override; | |
| 1369 static bool classof(const Inst *Inst) { return isClassof(Inst, Extract); } | |
| 1370 | |
| 1371 private: | |
| 1372 InstARM32Extract(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index, | |
| 1373 CondARM32::Cond Predicate) | |
| 1374 : InstARM32Pred(Func, InstARM32::Extract, 1, Dest, Predicate), | |
| 1375 Index(Index) { | |
|
Jim Stichnoth
2016/02/08 20:13:59
Could you add an assert to validate that Index is
Eric Holk
2016/02/08 21:24:17
Done.
| |
| 1376 addSource(Src0); | |
| 1377 } | |
| 1378 | |
| 1379 const uint32_t Index; | |
| 1380 }; | |
| 1381 | |
| 1382 /// Generates vmov Dn[x], Rd instructions, and their related floating point | |
| 1383 /// versions. | |
| 1384 class InstARM32Insert final : public InstARM32Pred { | |
| 1385 InstARM32Insert() = delete; | |
| 1386 InstARM32Insert(const InstARM32Insert &) = delete; | |
| 1387 InstARM32Insert &operator=(const InstARM32Insert &) = delete; | |
| 1388 | |
| 1389 public: | |
| 1390 static InstARM32Insert *create(Cfg *Func, Variable *Dest, Variable *Src0, | |
| 1391 uint32_t Index, CondARM32::Cond Predicate) { | |
| 1392 return new (Func->allocate<InstARM32Insert>()) | |
| 1393 InstARM32Insert(Func, Dest, Src0, Index, Predicate); | |
| 1394 } | |
| 1395 void emit(const Cfg *Func) const override; | |
| 1396 static bool classof(const Inst *Inst) { return isClassof(Inst, Insert); } | |
| 1397 | |
| 1398 private: | |
| 1399 InstARM32Insert(Cfg *Func, Variable *Dest, Variable *Src0, uint32_t Index, | |
| 1400 CondARM32::Cond Predicate) | |
| 1401 : InstARM32Pred(Func, InstARM32::Insert, 1, Dest, Predicate), | |
| 1402 Index(Index) { | |
| 1403 addSource(Src0); | |
| 1404 } | |
| 1405 | |
| 1406 const uint32_t Index; | |
| 1407 }; | |
| 1408 | |
| 1352 class InstARM32Vcmp final : public InstARM32Pred { | 1409 class InstARM32Vcmp final : public InstARM32Pred { |
| 1353 InstARM32Vcmp() = delete; | 1410 InstARM32Vcmp() = delete; |
| 1354 InstARM32Vcmp(const InstARM32Vcmp &) = delete; | 1411 InstARM32Vcmp(const InstARM32Vcmp &) = delete; |
| 1355 InstARM32Vcmp &operator=(const InstARM32Vcmp &) = delete; | 1412 InstARM32Vcmp &operator=(const InstARM32Vcmp &) = delete; |
| 1356 | 1413 |
| 1357 public: | 1414 public: |
| 1358 static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, Variable *Src1, | 1415 static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, Variable *Src1, |
| 1359 CondARM32::Cond Predicate) { | 1416 CondARM32::Cond Predicate) { |
| 1360 return new (Func->allocate<InstARM32Vcmp>()) | 1417 return new (Func->allocate<InstARM32Vcmp>()) |
| 1361 InstARM32Vcmp(Func, Src0, Src1, Predicate); | 1418 InstARM32Vcmp(Func, Src0, Src1, Predicate); |
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| 1439 // violations and link errors. | 1496 // violations and link errors. |
| 1440 | 1497 |
| 1441 template <> void InstARM32Ldr::emit(const Cfg *Func) const; | 1498 template <> void InstARM32Ldr::emit(const Cfg *Func) const; |
| 1442 template <> void InstARM32Movw::emit(const Cfg *Func) const; | 1499 template <> void InstARM32Movw::emit(const Cfg *Func) const; |
| 1443 template <> void InstARM32Movt::emit(const Cfg *Func) const; | 1500 template <> void InstARM32Movt::emit(const Cfg *Func) const; |
| 1444 | 1501 |
| 1445 } // end of namespace ARM32 | 1502 } // end of namespace ARM32 |
| 1446 } // end of namespace Ice | 1503 } // end of namespace Ice |
| 1447 | 1504 |
| 1448 #endif // SUBZERO_SRC_ICEINSTARM32_H | 1505 #endif // SUBZERO_SRC_ICEINSTARM32_H |
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