Fix nits in committed CL's for the integrated ARM assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 92 matching lines @@
   OstreamLocker L(Ctx);
   Ostream &OldStr = Ctx->getStrEmit();
   Ctx->setStrEmit(StrBuf);
   // Start counting instructions here, so that emit() methods don't
   // need to call this for the first instruction.
   Asm->resetEmitTextSize();
   Asm->incEmitTextSize(InstSize);
   emit(Func);
   Ctx->setStrEmit(OldStr);
   if (Ctx->getFlags().getDisableHybridAssembly()) {
-    llvm::errs() << "Can't assemble: " << StrBuf.str() << "\n";
-    UnimplementedError(Ctx->getFlags());
+    if (Ctx->getFlags().getSkipUnimplemented()) {
+      Asm->trap();
+    } else {
+      llvm::errs() << "Can't assemble: " << StrBuf.str() << "\n";
+      UnimplementedError(Ctx->getFlags());
+    }
     return;
   }
   Asm->emitTextInst(StrBuf.str(), Asm->getEmitTextSize());
 }
 
 void InstARM32::emitIAS(const Cfg *Func) const { emitUsingTextFixup(Func); }
 
 void InstARM32Pred::emitUnaryopGPR(const char *Opcode,
                                    const InstARM32Pred *Inst, const Cfg *Func,
                                    bool NeedsWidthSuffix) {
@@ skipping 1569 matching lines @@
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   const Operand *Dest = getDest();
   switch (Dest->getType()) {
   case IceType_f32:
     Asm->vsqrts(Dest, getSrc(0), getPredicate());
     break;
   case IceType_f64:
     Asm->vsqrtd(Dest, getSrc(0), getPredicate());
     break;
   default:
-    llvm::report_fatal_error("Vqrt of non-floating type");
+    llvm::report_fatal_error("Vsqrt of non-floating type");
   }
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
 const char *InstARM32Pop::getGPROpcode() const { return "pop"; }
 
 const char *InstARM32Pop::getSRegOpcode() const { return "vpop"; }
 
 Variable *InstARM32Pop::getStackReg(SizeT Index) const { return Dests[Index]; }
@@ skipping 741 matching lines @@
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace ARM32
 } // end of namespace Ice