Implements the vector add instructions in the integrated ARM assembler.

src/DartARM32/assembler_arm.cc

Index: src/DartARM32/assembler_arm.cc
diff --git a/src/DartARM32/assembler_arm.cc b/src/DartARM32/assembler_arm.cc
index 52fc50402ae2aa6af06bb2f6f23ecdfd3fb273a6..74c0de50ea729f7b54765e830baf2a55d928d53d 100644
--- a/src/DartARM32/assembler_arm.cc
+++ b/src/DartARM32/assembler_arm.cc
@@ -1213,7 +1213,8 @@ static inline int ShiftOfOperandSize(OperandSize size) {
   return -1;
 }
 
-
+#if 0
+// Moved to ARM32::AssemblerARM32::emitSIMDqqq()
 void Assembler::EmitSIMDqqq(int32_t opcode, OperandSize size,
                             QRegister qd, QRegister qn, QRegister qm) {
   ASSERT(TargetCPUFeatures::neon_supported());
@@ -1230,7 +1231,7 @@ void Assembler::EmitSIMDqqq(int32_t opcode, OperandSize size,
       (static_cast<int32_t>(qm * 2) & 0xf);
   Emit(encoding);
 }
-
+endif

[Jim Stichnoth, 2016/02/01 21:00:23]

#endif

[Karl, 2016/02/01 21:44:53]

Done.

 
 void Assembler::EmitSIMDddd(int32_t opcode, OperandSize size,
                             DRegister dd, DRegister dn, DRegister dm) {
@@ -1254,17 +1255,18 @@ void Assembler::vmovq(QRegister qd, QRegister qm) {
   EmitSIMDqqq(B21 | B8 | B4, kByte, qd, qm, qm);
 }
 
-
+#if 0
+// Moved to ARM32::AssemblerARM32::vaddqi().
 void Assembler::vaddqi(OperandSize sz,
                        QRegister qd, QRegister qn, QRegister qm) {
   EmitSIMDqqq(B11, sz, qd, qn, qm);
 }
 
-
+// Moved to ARM32::AssemblerARM32::vaddqf().
 void Assembler::vaddqs(QRegister qd, QRegister qn, QRegister qm) {
   EmitSIMDqqq(B11 | B10 | B8, kSWord, qd, qn, qm);
 }
-
+#edndif

[Jim Stichnoth, 2016/02/01 21:00:23]

#endif

[Karl, 2016/02/01 21:44:53]

Done.

 
 void Assembler::vsubqi(OperandSize sz,
                        QRegister qd, QRegister qn, QRegister qm) {