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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1651263002: Add VSUB vector instruction to the integrated ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 10 months ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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454 454
455 void vstrs(const Operand *OpSd, const Operand *OpAddress, 455 void vstrs(const Operand *OpSd, const Operand *OpAddress,
456 CondARM32::Cond Cond, const TargetLowering *Lowering) { 456 CondARM32::Cond Cond, const TargetLowering *Lowering) {
457 const TargetInfo TInfo(Lowering); 457 const TargetInfo TInfo(Lowering);
458 vstrs(OpSd, OpAddress, Cond, TInfo); 458 vstrs(OpSd, OpAddress, Cond, TInfo);
459 } 459 }
460 460
461 void vsubd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm, 461 void vsubd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm,
462 CondARM32::Cond Cond); 462 CondARM32::Cond Cond);
463 463
464 // Integer vector subtract.
465 void vsubqi(Type ElmtTy, const Operand *OpQd, const Operand *OpQm,
466 const Operand *OpQn);
467
468 // Float vector subtract
469 void vsubqf(const Operand *OpQd, const Operand *OpQm, const Operand *OpQn);
470
464 void vsubs(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm, 471 void vsubs(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm,
465 CondARM32::Cond Cond); 472 CondARM32::Cond Cond);
466 473
467 static bool classof(const Assembler *Asm) { 474 static bool classof(const Assembler *Asm) {
468 return Asm->getKind() == Asm_ARM32; 475 return Asm->getKind() == Asm_ARM32;
469 } 476 }
470 477
471 void emitTextInst(const std::string &Text, SizeT InstSize); 478 void emitTextInst(const std::string &Text, SizeT InstSize);
472 479
473 private: 480 private:
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647 654
648 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpSd, 655 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpSd,
649 const Operand *OpSn, const Operand *OpSm, 656 const Operand *OpSn, const Operand *OpSm,
650 const char *InstName); 657 const char *InstName);
651 }; 658 };
652 659
653 } // end of namespace ARM32 660 } // end of namespace ARM32
654 } // end of namespace Ice 661 } // end of namespace Ice
655 662
656 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 663 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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