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Issue 164793003: A64: Use a scope utility to allocate scratch registers. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Rebase. Created 6 years, 9 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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79 InstructionAccurateScope scope(masm_, 1); 79 InstructionAccurateScope scope(masm_, 1);
80 ASSERT(!info_emitted_); 80 ASSERT(!info_emitted_);
81 ASSERT(reg.Is64Bits()); 81 ASSERT(reg.Is64Bits());
82 ASSERT(!reg.Is(csp)); 82 ASSERT(!reg.Is(csp));
83 reg_ = reg; 83 reg_ = reg;
84 __ bind(&patch_site_); 84 __ bind(&patch_site_);
85 __ tbnz(xzr, 0, target); // Never taken before patched. 85 __ tbnz(xzr, 0, target); // Never taken before patched.
86 } 86 }
87 87
88 void EmitJumpIfEitherNotSmi(Register reg1, Register reg2, Label* target) { 88 void EmitJumpIfEitherNotSmi(Register reg1, Register reg2, Label* target) {
89 // We need to use ip0, so don't allow access to the MacroAssembler. 89 UseScratchRegisterScope temps(masm_);
90 InstructionAccurateScope scope(masm_); 90 Register temp = temps.AcquireX();
91 __ orr(ip0, reg1, reg2); 91 __ Orr(temp, reg1, reg2);
92 EmitJumpIfNotSmi(ip0, target); 92 EmitJumpIfNotSmi(temp, target);
93 } 93 }
94 94
95 void EmitPatchInfo() { 95 void EmitPatchInfo() {
96 Assembler::BlockPoolsScope scope(masm_); 96 Assembler::BlockPoolsScope scope(masm_);
97 InlineSmiCheckInfo::Emit(masm_, reg_, &patch_site_); 97 InlineSmiCheckInfo::Emit(masm_, reg_, &patch_site_);
98 #ifdef DEBUG 98 #ifdef DEBUG
99 info_emitted_ = true; 99 info_emitted_ = true;
100 #endif 100 #endif
101 } 101 }
102 102
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4970 return previous_; 4970 return previous_;
4971 } 4971 }
4972 4972
4973 4973
4974 #undef __ 4974 #undef __
4975 4975
4976 4976
4977 } } // namespace v8::internal 4977 } } // namespace v8::internal
4978 4978
4979 #endif // V8_TARGET_ARCH_A64 4979 #endif // V8_TARGET_ARCH_A64
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