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| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 454 CPURegister::RegisterType type() const { | 454 CPURegister::RegisterType type() const { |
| 455 ASSERT(IsValid()); | 455 ASSERT(IsValid()); |
| 456 return type_; | 456 return type_; |
| 457 } | 457 } |
| 458 | 458 |
| 459 RegList list() const { | 459 RegList list() const { |
| 460 ASSERT(IsValid()); | 460 ASSERT(IsValid()); |
| 461 return list_; | 461 return list_; |
| 462 } | 462 } |
| 463 | 463 |
| 464 inline void set_list(RegList new_list) { |
| 465 ASSERT(IsValid()); |
| 466 list_ = new_list; |
| 467 } |
| 468 |
| 464 // Combine another CPURegList into this one. Registers that already exist in | 469 // Combine another CPURegList into this one. Registers that already exist in |
| 465 // this list are left unchanged. The type and size of the registers in the | 470 // this list are left unchanged. The type and size of the registers in the |
| 466 // 'other' list must match those in this list. | 471 // 'other' list must match those in this list. |
| 467 void Combine(const CPURegList& other); | 472 void Combine(const CPURegList& other); |
| 468 | 473 |
| 469 // Remove every register in the other CPURegList from this one. Registers that | 474 // Remove every register in the other CPURegList from this one. Registers that |
| 470 // do not exist in this list are ignored. The type and size of the registers | 475 // do not exist in this list are ignored. The type and size of the registers |
| 471 // in the 'other' list must match those in this list. | 476 // in the 'other' list must match those in this list. |
| 472 void Remove(const CPURegList& other); | 477 void Remove(const CPURegList& other); |
| 473 | 478 |
| 474 // Variants of Combine and Remove which take a single register. | 479 // Variants of Combine and Remove which take CPURegisters. |
| 475 void Combine(const CPURegister& other); | 480 void Combine(const CPURegister& other); |
| 476 void Remove(const CPURegister& other); | 481 void Remove(const CPURegister& other1, |
| 482 const CPURegister& other2 = NoCPUReg, |
| 483 const CPURegister& other3 = NoCPUReg, |
| 484 const CPURegister& other4 = NoCPUReg); |
| 477 | 485 |
| 478 // Variants of Combine and Remove which take a single register by its code; | 486 // Variants of Combine and Remove which take a single register by its code; |
| 479 // the type and size of the register is inferred from this list. | 487 // the type and size of the register is inferred from this list. |
| 480 void Combine(int code); | 488 void Combine(int code); |
| 481 void Remove(int code); | 489 void Remove(int code); |
| 482 | 490 |
| 483 // Remove all callee-saved registers from the list. This can be useful when | 491 // Remove all callee-saved registers from the list. This can be useful when |
| 484 // preparing registers for an AAPCS64 function call, for example. | 492 // preparing registers for an AAPCS64 function call, for example. |
| 485 void RemoveCalleeSaved(); | 493 void RemoveCalleeSaved(); |
| 486 | 494 |
| 487 CPURegister PopLowestIndex(); | 495 CPURegister PopLowestIndex(); |
| 488 CPURegister PopHighestIndex(); | 496 CPURegister PopHighestIndex(); |
| 489 | 497 |
| 490 // AAPCS64 callee-saved registers. | 498 // AAPCS64 callee-saved registers. |
| 491 static CPURegList GetCalleeSaved(unsigned size = kXRegSize); | 499 static CPURegList GetCalleeSaved(unsigned size = kXRegSize); |
| 492 static CPURegList GetCalleeSavedFP(unsigned size = kDRegSize); | 500 static CPURegList GetCalleeSavedFP(unsigned size = kDRegSize); |
| 493 | 501 |
| 494 // AAPCS64 caller-saved registers. Note that this includes lr. | 502 // AAPCS64 caller-saved registers. Note that this includes lr. |
| 495 static CPURegList GetCallerSaved(unsigned size = kXRegSize); | 503 static CPURegList GetCallerSaved(unsigned size = kXRegSize); |
| 496 static CPURegList GetCallerSavedFP(unsigned size = kDRegSize); | 504 static CPURegList GetCallerSavedFP(unsigned size = kDRegSize); |
| 497 | 505 |
| 498 // Registers saved as safepoints. | 506 // Registers saved as safepoints. |
| 499 static CPURegList GetSafepointSavedRegisters(); | 507 static CPURegList GetSafepointSavedRegisters(); |
| 500 | 508 |
| 501 bool IsEmpty() const { | 509 bool IsEmpty() const { |
| 502 ASSERT(IsValid()); | 510 ASSERT(IsValid()); |
| 503 return list_ == 0; | 511 return list_ == 0; |
| 504 } | 512 } |
| 505 | 513 |
| 506 bool IncludesAliasOf(const CPURegister& other) const { | 514 bool IncludesAliasOf(const CPURegister& other1, |
| 515 const CPURegister& other2 = NoCPUReg, |
| 516 const CPURegister& other3 = NoCPUReg, |
| 517 const CPURegister& other4 = NoCPUReg) const { |
| 507 ASSERT(IsValid()); | 518 ASSERT(IsValid()); |
| 508 return (type_ == other.type()) && (other.Bit() & list_); | 519 RegList list = 0; |
| 520 if (!other1.IsNone() && (other1.type() == type_)) list |= other1.Bit(); |
| 521 if (!other2.IsNone() && (other2.type() == type_)) list |= other2.Bit(); |
| 522 if (!other3.IsNone() && (other3.type() == type_)) list |= other3.Bit(); |
| 523 if (!other4.IsNone() && (other4.type() == type_)) list |= other4.Bit(); |
| 524 return (list_ & list) != 0; |
| 509 } | 525 } |
| 510 | 526 |
| 511 int Count() const { | 527 int Count() const { |
| 512 ASSERT(IsValid()); | 528 ASSERT(IsValid()); |
| 513 return CountSetBits(list_, kRegListSizeInBits); | 529 return CountSetBits(list_, kRegListSizeInBits); |
| 514 } | 530 } |
| 515 | 531 |
| 516 unsigned RegisterSizeInBits() const { | 532 unsigned RegisterSizeInBits() const { |
| 517 ASSERT(IsValid()); | 533 ASSERT(IsValid()); |
| 518 return size_; | 534 return size_; |
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| 2152 class EnsureSpace BASE_EMBEDDED { | 2168 class EnsureSpace BASE_EMBEDDED { |
| 2153 public: | 2169 public: |
| 2154 explicit EnsureSpace(Assembler* assembler) { | 2170 explicit EnsureSpace(Assembler* assembler) { |
| 2155 assembler->CheckBuffer(); | 2171 assembler->CheckBuffer(); |
| 2156 } | 2172 } |
| 2157 }; | 2173 }; |
| 2158 | 2174 |
| 2159 } } // namespace v8::internal | 2175 } } // namespace v8::internal |
| 2160 | 2176 |
| 2161 #endif // V8_A64_ASSEMBLER_A64_H_ | 2177 #endif // V8_A64_ASSEMBLER_A64_H_ |
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