A64: Use a scope utility to allocate scratch registers.

src/a64/macro-assembler-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 35 matching lines @@
 MacroAssembler::MacroAssembler(Isolate* arg_isolate,
                                byte * buffer,
                                unsigned buffer_size)
     : Assembler(arg_isolate, buffer, buffer_size),
       generating_stub_(false),
 #if DEBUG
       allow_macro_instructions_(true),
 #endif
       has_frame_(false),
       use_real_aborts_(true),
-      sp_(jssp), tmp0_(ip0), tmp1_(ip1), fptmp0_(fp_scratch) {
+      sp_(jssp), tmp_list_(ip0, ip1), fptmp_list_(fp_scratch) {
   if (isolate() != NULL) {
     code_object_ = Handle<Object>(isolate()->heap()->undefined_value(),
                                   isolate());
   }
 }
 
 
 void MacroAssembler::LogicalMacro(const Register& rd,
                                   const Register& rn,
                                   const Operand& operand,
                                   LogicalOp op) {
+  UseScratchRegisterScope temps(this);
+
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    Logical(rd, rn, Tmp0(), op);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    Logical(rd, rn, temp, op);
 
   } else if (operand.IsImmediate()) {
     int64_t immediate = operand.immediate();
     unsigned reg_size = rd.SizeInBits();
     ASSERT(rd.Is64Bits() || is_uint32(immediate));
 
     // If the operation is NOT, invert the operation and immediate.
     if ((op & NOT) == NOT) {
       op = static_cast<LogicalOp>(op & ~NOT);
       immediate = ~immediate;
@@ skipping 37 matching lines @@
           UNREACHABLE();
       }
     }
 
     unsigned n, imm_s, imm_r;
     if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
       // Immediate can be encoded in the instruction.
       LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
     } else {
       // Immediate can't be encoded: synthesize using move immediate.
-      Register temp = AppropriateTempFor(rn);
+      Register temp = temps.AcquireSameSizeAs(rn);
       Mov(temp, immediate);
       if (rd.Is(csp)) {
         // If rd is the stack pointer we cannot use it as the destination
         // register so we use the temp register as an intermediate again.
         Logical(temp, rn, temp, op);
         Mov(csp, temp);
       } else {
         Logical(rd, rn, temp, op);
       }
     }
 
   } else if (operand.IsExtendedRegister()) {
     ASSERT(operand.reg().SizeInBits() <= rd.SizeInBits());
     // Add/sub extended supports shift <= 4. We want to support exactly the
     // same modes here.
     ASSERT(operand.shift_amount() <= 4);
     ASSERT(operand.reg().Is64Bits() ||
            ((operand.extend() != UXTX) && (operand.extend() != SXTX)));
-    Register temp = AppropriateTempFor(rn, operand.reg());
+    Register temp = temps.AcquireSameSizeAs(rn);
     EmitExtendShift(temp, operand.reg(), operand.extend(),
                     operand.shift_amount());
     Logical(rd, rn, temp, op);
 
   } else {
     // The operand can be encoded in the instruction.
     ASSERT(operand.IsShiftedRegister());
     Logical(rd, rn, operand, op);
   }
 }
@@ skipping 43 matching lines @@
     uint64_t ignored_halfword = 0;
     bool invert_move = false;
     // If the number of 0xffff halfwords is greater than the number of 0x0000
     // halfwords, it's more efficient to use move-inverted.
     if (CountClearHalfWords(~imm, reg_size) >
         CountClearHalfWords(imm, reg_size)) {
       ignored_halfword = 0xffffL;
       invert_move = true;
     }
 
-    // Mov instructions can't move value into the stack pointer, so set up a
-    // temporary register, if needed.
-    Register temp = rd.IsSP() ? AppropriateTempFor(rd) : rd;
+    // Mov instructions can't move immediate values into the stack pointer, so
+    // set up a temporary register, if needed.
+    UseScratchRegisterScope temps(this);
+    Register temp = rd.IsSP() ? temps.AcquireSameSizeAs(rd) : rd;
 
     // Iterate through the halfwords. Use movn/movz for the first non-ignored
     // halfword, and movk for subsequent halfwords.
     ASSERT((reg_size % 16) == 0);
     bool first_mov_done = false;
     for (unsigned i = 0; i < (rd.SizeInBits() / 16); i++) {
       uint64_t imm16 = (imm >> (16 * i)) & 0xffffL;
       if (imm16 != ignored_halfword) {
         if (!first_mov_done) {
           if (invert_move) {
@@ skipping 17 matching lines @@
     }
   }
 }
 
 
 void MacroAssembler::Mov(const Register& rd,
                          const Operand& operand,
                          DiscardMoveMode discard_mode) {
   ASSERT(allow_macro_instructions_);
   ASSERT(!rd.IsZero());
+
   // Provide a swap register for instructions that need to write into the
   // system stack pointer (and can't do this inherently).
-  Register dst = (rd.Is(csp)) ? (Tmp1()) : (rd);
+  UseScratchRegisterScope temps(this);
+  Register dst = (rd.IsSP()) ? temps.AcquireSameSizeAs(rd) : rd;
 
   if (operand.NeedsRelocation()) {
     LoadRelocated(dst, operand);
 
   } else if (operand.IsImmediate()) {
     // Call the macro assembler for generic immediates.
     Mov(dst, operand.immediate());
 
   } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
     // Emit a shift instruction if moving a shifted register. This operation
@@ skipping 20 matching lines @@
     if (!rd.Is(operand.reg()) || (rd.Is32Bits() &&
                                   (discard_mode == kDontDiscardForSameWReg))) {
       Assembler::mov(rd, operand.reg());
     }
     // This case can handle writes into the system stack pointer directly.
     dst = rd;
   }
 
   // Copy the result to the system stack pointer.
   if (!dst.Is(rd)) {
-    ASSERT(rd.IsZero());
-    ASSERT(dst.Is(Tmp1()));
+    ASSERT(rd.IsSP());
     Assembler::mov(rd, dst);
   }
 }
 
 
 void MacroAssembler::Mvn(const Register& rd, const Operand& operand) {
   ASSERT(allow_macro_instructions_);
 
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    Mvn(rd, Tmp0());
+    LoadRelocated(rd, operand);
+    mvn(rd, rd);
 
   } else if (operand.IsImmediate()) {
     // Call the macro assembler for generic immediates.
     Mov(rd, ~operand.immediate());
 
   } else if (operand.IsExtendedRegister()) {
     // Emit two instructions for the extend case. This differs from Mov, as
     // the extend and invert can't be achieved in one instruction.
-    Register temp = AppropriateTempFor(rd, operand.reg());
-    EmitExtendShift(temp, operand.reg(), operand.extend(),
+    EmitExtendShift(rd, operand.reg(), operand.extend(),
                     operand.shift_amount());
-    mvn(rd, temp);
+    mvn(rd, rd);
 
   } else {
-    // Otherwise, emit a register move only if the registers are distinct.
-    // If the jssp is an operand, add #0 is emitted, otherwise, orr #0.
     mvn(rd, operand);
   }
 }
 
 
 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) {
   ASSERT((reg_size % 8) == 0);
   int count = 0;
   for (unsigned i = 0; i < (reg_size / 16); i++) {
     if ((imm & 0xffff) == 0) {
@@ skipping 20 matching lines @@
 }
 
 
 void MacroAssembler::ConditionalCompareMacro(const Register& rn,
                                              const Operand& operand,
                                              StatusFlags nzcv,
                                              Condition cond,
                                              ConditionalCompareOp op) {
   ASSERT((cond != al) && (cond != nv));
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    ConditionalCompareMacro(rn, Tmp0(), nzcv, cond, op);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    ConditionalCompareMacro(rn, temp, nzcv, cond, op);
 
   } else if ((operand.IsShiftedRegister() && (operand.shift_amount() == 0)) ||
       (operand.IsImmediate() && IsImmConditionalCompare(operand.immediate()))) {
     // The immediate can be encoded in the instruction, or the operand is an
     // unshifted register: call the assembler.
     ConditionalCompare(rn, operand, nzcv, cond, op);
 
   } else {
     // The operand isn't directly supported by the instruction: perform the
     // operation on a temporary register.
-    Register temp = AppropriateTempFor(rn);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     ConditionalCompare(rn, temp, nzcv, cond, op);
   }
 }
 
 
 void MacroAssembler::Csel(const Register& rd,
                           const Register& rn,
                           const Operand& operand,
                           Condition cond) {
   ASSERT(allow_macro_instructions_);
   ASSERT(!rd.IsZero());
   ASSERT((cond != al) && (cond != nv));
   if (operand.IsImmediate()) {
     // Immediate argument. Handle special cases of 0, 1 and -1 using zero
     // register.
     int64_t imm = operand.immediate();
     Register zr = AppropriateZeroRegFor(rn);
     if (imm == 0) {
       csel(rd, rn, zr, cond);
     } else if (imm == 1) {
       csinc(rd, rn, zr, cond);
     } else if (imm == -1) {
       csinv(rd, rn, zr, cond);
     } else {
-      Register temp = AppropriateTempFor(rn);
+      UseScratchRegisterScope temps(this);
+      Register temp = temps.AcquireSameSizeAs(rn);
       Mov(temp, operand.immediate());
       csel(rd, rn, temp, cond);
     }
   } else if (operand.IsShiftedRegister() && (operand.shift_amount() == 0)) {
     // Unshifted register argument.
     csel(rd, rn, operand.reg(), cond);
   } else {
     // All other arguments.
-    Register temp = AppropriateTempFor(rn);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     csel(rd, rn, temp, cond);
   }
 }
 
 
 void MacroAssembler::AddSubMacro(const Register& rd,
                                  const Register& rn,
                                  const Operand& operand,
                                  FlagsUpdate S,
                                  AddSubOp op) {
   if (operand.IsZero() && rd.Is(rn) && rd.Is64Bits() && rn.Is64Bits() &&
       !operand.NeedsRelocation() && (S == LeaveFlags)) {
     // The instruction would be a nop. Avoid generating useless code.
     return;
   }
 
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    AddSubMacro(rd, rn, Tmp0(), S, op);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    AddSubMacro(rd, rn, temp, S, op);
   } else if ((operand.IsImmediate() && !IsImmAddSub(operand.immediate())) ||
              (rn.IsZero() && !operand.IsShiftedRegister())                ||
              (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
-    Register temp = AppropriateTempFor(rn);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     AddSub(rd, rn, temp, S, op);
   } else {
     AddSub(rd, rn, operand, S, op);
   }
 }
 
 
 void MacroAssembler::AddSubWithCarryMacro(const Register& rd,
                                           const Register& rn,
                                           const Operand& operand,
                                           FlagsUpdate S,
                                           AddSubWithCarryOp op) {
   ASSERT(rd.SizeInBits() == rn.SizeInBits());
+  UseScratchRegisterScope temps(this);
 
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    AddSubWithCarryMacro(rd, rn, Tmp0(), S, op);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    AddSubWithCarryMacro(rd, rn, temp, S, op);
 
   } else if (operand.IsImmediate() ||
              (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
     // Add/sub with carry (immediate or ROR shifted register.)
-    Register temp = AppropriateTempFor(rn);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     AddSubWithCarry(rd, rn, temp, S, op);
+
   } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
     // Add/sub with carry (shifted register).
     ASSERT(operand.reg().SizeInBits() == rd.SizeInBits());
     ASSERT(operand.shift() != ROR);
-    ASSERT(is_uintn(operand.shift_amount(),
-          rd.SizeInBits() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2));
-    Register temp = AppropriateTempFor(rn, operand.reg());
+    ASSERT(
+        is_uintn(operand.shift_amount(),
+                 rd.SizeInBits() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2));
+    Register temp = temps.AcquireSameSizeAs(rn);
     EmitShift(temp, operand.reg(), operand.shift(), operand.shift_amount());
     AddSubWithCarry(rd, rn, temp, S, op);
 
   } else if (operand.IsExtendedRegister()) {
     // Add/sub with carry (extended register).
     ASSERT(operand.reg().SizeInBits() <= rd.SizeInBits());
     // Add/sub extended supports a shift <= 4. We want to support exactly the
     // same modes.
     ASSERT(operand.shift_amount() <= 4);
     ASSERT(operand.reg().Is64Bits() ||
            ((operand.extend() != UXTX) && (operand.extend() != SXTX)));
-    Register temp = AppropriateTempFor(rn, operand.reg());
+    Register temp = temps.AcquireSameSizeAs(rn);
     EmitExtendShift(temp, operand.reg(), operand.extend(),
                     operand.shift_amount());
     AddSubWithCarry(rd, rn, temp, S, op);
 
   } else {
     // The addressing mode is directly supported by the instruction.
     AddSubWithCarry(rd, rn, operand, S, op);
   }
 }
 
 
 void MacroAssembler::LoadStoreMacro(const CPURegister& rt,
                                     const MemOperand& addr,
                                     LoadStoreOp op) {
   int64_t offset = addr.offset();
   LSDataSize size = CalcLSDataSize(op);
 
   // Check if an immediate offset fits in the immediate field of the
   // appropriate instruction. If not, emit two instructions to perform
   // the operation.
   if (addr.IsImmediateOffset() && !IsImmLSScaled(offset, size) &&
       !IsImmLSUnscaled(offset)) {
     // Immediate offset that can't be encoded using unsigned or unscaled
     // addressing modes.
-    Register temp = AppropriateTempFor(addr.base());
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(addr.base());
     Mov(temp, addr.offset());
     LoadStore(rt, MemOperand(addr.base(), temp), op);
   } else if (addr.IsPostIndex() && !IsImmLSUnscaled(offset)) {
     // Post-index beyond unscaled addressing range.
     LoadStore(rt, MemOperand(addr.base()), op);
     add(addr.base(), addr.base(), offset);
   } else if (addr.IsPreIndex() && !IsImmLSUnscaled(offset)) {
     // Pre-index beyond unscaled addressing range.
     add(addr.base(), addr.base(), offset);
     LoadStore(rt, MemOperand(addr.base()), op);
@@ skipping 422 matching lines @@
   }
 }
 
 
 void MacroAssembler::PushMultipleTimes(CPURegister src, int count) {
   int size = src.SizeInBytes();
 
   PrepareForPush(count, size);
 
   if (FLAG_optimize_for_size && count > 8) {
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+
     Label loop;
-    __ Mov(Tmp0(), count / 2);
+    __ Mov(temp, count / 2);
     __ Bind(&loop);
     PushHelper(2, size, src, src, NoReg, NoReg);
-    __ Subs(Tmp0(), Tmp0(), 1);
+    __ Subs(temp, temp, 1);
     __ B(ne, &loop);
 
     count %= 2;
   }
 
   // Push up to four registers at a time if possible because if the current
   // stack pointer is csp and the register size is 32, registers must be pushed
   // in blocks of four in order to maintain the 16-byte alignment for csp.
   while (count >= 4) {
     PushHelper(4, size, src, src, src, src);
     count -= 4;
   }
   if (count >= 2) {
     PushHelper(2, size, src, src, NoReg, NoReg);
     count -= 2;
   }
   if (count == 1) {
     PushHelper(1, size, src, NoReg, NoReg, NoReg);
     count -= 1;
   }
   ASSERT(count == 0);
 }
 
 
 void MacroAssembler::PushMultipleTimes(CPURegister src, Register count) {
   PrepareForPush(Operand(count, UXTW, WhichPowerOf2(src.SizeInBytes())));
 
-  Register temp = AppropriateTempFor(count);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireSameSizeAs(count);
 
   if (FLAG_optimize_for_size) {
     Label loop, done;
 
     Subs(temp, count, 1);
     B(mi, &done);
 
     // Push all registers individually, to save code size.
     Bind(&loop);
     Subs(temp, temp, 1);
@@ skipping 423 matching lines @@
   Add(scratch1, object, Code::kHeaderSize - kHeapObjectTag);
   Add(scratch1, scratch1, Operand::UntagSmi(scratch2));
   Br(scratch1);
 }
 
 
 void MacroAssembler::InNewSpace(Register object,
                                 Condition cond,
                                 Label* branch) {
   ASSERT(cond == eq || cond == ne);
-  // Use Tmp1() to have a different destination register, as Tmp0() will be used
-  // for relocation.
-  And(Tmp1(), object, Operand(ExternalReference::new_space_mask(isolate())));
-  Cmp(Tmp1(), Operand(ExternalReference::new_space_start(isolate())));
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  And(temp, object, Operand(ExternalReference::new_space_mask(isolate())));
+  Cmp(temp, Operand(ExternalReference::new_space_start(isolate())));
   B(cond, branch);
 }
 
 
 void MacroAssembler::Throw(Register value,
                            Register scratch1,
                            Register scratch2,
                            Register scratch3,
                            Register scratch4) {
   // Adjust this code if not the case.
@@ skipping 148 matching lines @@
 
 void MacroAssembler::AssertName(Register object) {
   if (emit_debug_code()) {
     STATIC_ASSERT(kSmiTag == 0);
     // TODO(jbramley): Add AbortIfSmi and related functions.
     Label not_smi;
     JumpIfNotSmi(object, &not_smi);
     Abort(kOperandIsASmiAndNotAName);
     Bind(&not_smi);
 
-    Ldr(Tmp1(), FieldMemOperand(object, HeapObject::kMapOffset));
-    CompareInstanceType(Tmp1(), Tmp1(), LAST_NAME_TYPE);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+
+    Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
+    CompareInstanceType(temp, temp, LAST_NAME_TYPE);
     Check(ls, kOperandIsNotAName);
   }
 }
 
 
 void MacroAssembler::AssertString(Register object) {
   if (emit_debug_code()) {
-    Register temp = Tmp1();
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
     STATIC_ASSERT(kSmiTag == 0);
     Tst(object, kSmiTagMask);
     Check(ne, kOperandIsASmiAndNotAString);
     Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
     CompareInstanceType(temp, temp, FIRST_NONSTRING_TYPE);
     Check(lo, kOperandIsNotAString);
   }
 }
 
 
@@ skipping 296 matching lines @@
 
 void MacroAssembler::CallCFunction(ExternalReference function,
                                    int num_of_reg_args) {
   CallCFunction(function, num_of_reg_args, 0);
 }
 
 
 void MacroAssembler::CallCFunction(ExternalReference function,
                                    int num_of_reg_args,
                                    int num_of_double_args) {
-  Mov(Tmp0(), Operand(function));
-  CallCFunction(Tmp0(), num_of_reg_args, num_of_double_args);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Mov(temp, Operand(function));
+  CallCFunction(temp, num_of_reg_args, num_of_double_args);
 }
 
 
 void MacroAssembler::CallCFunction(Register function,
                                    int num_of_reg_args,
                                    int num_of_double_args) {
   ASSERT(has_frame());
   // We can pass 8 integer arguments in registers. If we need to pass more than
   // that, we'll need to implement support for passing them on the stack.
   ASSERT(num_of_reg_args <= 8);
@@ skipping 32 matching lines @@
 
   // Call directly. The function called cannot cause a GC, or allow preemption,
   // so the return address in the link register stays correct.
   Call(function);
 
   if (!csp.Is(old_stack_pointer)) {
     if (emit_debug_code()) {
       // Because the stack pointer must be aligned on a 16-byte boundary, the
       // aligned csp can be up to 12 bytes below the jssp. This is the case
       // where we only pushed one W register on top of an aligned jssp.
-      Register temp = Tmp1();
+      UseScratchRegisterScope temps(this);
+      Register temp = temps.AcquireX();
       ASSERT(ActivationFrameAlignment() == 16);
       Sub(temp, csp, old_stack_pointer);
       // We want temp <= 0 && temp >= -12.
       Cmp(temp, 0);
       Ccmp(temp, -12, NFlag, le);
       Check(ge, kTheStackWasCorruptedByMacroAssemblerCall);
     }
     SetStackPointer(old_stack_pointer);
   }
 }
 
 
 void MacroAssembler::Jump(Register target) {
   Br(target);
 }
 
 
 void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode) {
-  Mov(Tmp0(), Operand(target, rmode));
-  Br(Tmp0());
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Mov(temp, Operand(target, rmode));
+  Br(temp);
 }
 
 
 void MacroAssembler::Jump(Address target, RelocInfo::Mode rmode) {
   ASSERT(!RelocInfo::IsCodeTarget(rmode));
   Jump(reinterpret_cast<intptr_t>(target), rmode);
 }
 
 
 void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode) {
@@ skipping 41 matching lines @@
   Label start_call;
   Bind(&start_call);
 #endif
   // Statement positions are expected to be recorded when the target
   // address is loaded.
   positions_recorder()->WriteRecordedPositions();
 
   // Addresses always have 64 bits, so we shouldn't encounter NONE32.
   ASSERT(rmode != RelocInfo::NONE32);
 
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+
   if (rmode == RelocInfo::NONE64) {
     uint64_t imm = reinterpret_cast<uint64_t>(target);
-    movz(Tmp0(), (imm >> 0) & 0xffff, 0);
-    movk(Tmp0(), (imm >> 16) & 0xffff, 16);
-    movk(Tmp0(), (imm >> 32) & 0xffff, 32);
-    movk(Tmp0(), (imm >> 48) & 0xffff, 48);
+    movz(temp, (imm >> 0) & 0xffff, 0);
+    movk(temp, (imm >> 16) & 0xffff, 16);
+    movk(temp, (imm >> 32) & 0xffff, 32);
+    movk(temp, (imm >> 48) & 0xffff, 48);
   } else {
-    LoadRelocated(Tmp0(), Operand(reinterpret_cast<intptr_t>(target), rmode));
+    LoadRelocated(temp, Operand(reinterpret_cast<intptr_t>(target), rmode));
   }
-  Blr(Tmp0());
+  Blr(temp);
 #ifdef DEBUG
   AssertSizeOfCodeGeneratedSince(&start_call, CallSize(target, rmode));
 #endif
 }
 
 
 void MacroAssembler::Call(Handle<Code> code,
                           RelocInfo::Mode rmode,
                           TypeFeedbackId ast_id) {
 #ifdef DEBUG
@@ skipping 60 matching lines @@
 
 
 
 
 
 void MacroAssembler::JumpForHeapNumber(Register object,
                                        Register heap_number_map,
                                        Label* on_heap_number,
                                        Label* on_not_heap_number) {
   ASSERT(on_heap_number || on_not_heap_number);
-  // Tmp0() is used as a scratch register.
-  ASSERT(!AreAliased(Tmp0(), heap_number_map));
   AssertNotSmi(object);
 
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+
   // Load the HeapNumber map if it is not passed.
   if (heap_number_map.Is(NoReg)) {
-    heap_number_map = Tmp1();
+    heap_number_map = temps.AcquireX();
     LoadRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   } else {
-    // This assert clobbers Tmp0(), so do it before loading Tmp0() with the map.
     AssertRegisterIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   }
 
-  Ldr(Tmp0(), FieldMemOperand(object, HeapObject::kMapOffset));
-  Cmp(Tmp0(), heap_number_map);
+  ASSERT(!AreAliased(temp, heap_number_map));
+
+  Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
+  Cmp(temp, heap_number_map);
 
   if (on_heap_number) {
     B(eq, on_heap_number);
   }
   if (on_not_heap_number) {
     B(ne, on_not_heap_number);
   }
 }
 
 
@@ skipping 105 matching lines @@
     B(on_successful_conversion, eq);
   }
   if (on_failed_conversion) {
     B(on_failed_conversion, ne);
   }
 }
 
 
 void MacroAssembler::JumpIfMinusZero(DoubleRegister input,
                                      Label* on_negative_zero) {
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
   // Floating point -0.0 is kMinInt as an integer, so subtracting 1 (cmp) will
   // cause overflow.
-  Fmov(Tmp0(), input);
-  Cmp(Tmp0(), 1);
+  Fmov(temp, input);
+  Cmp(temp, 1);
   B(vs, on_negative_zero);
 }
 
 
 void MacroAssembler::ClampInt32ToUint8(Register output, Register input) {
   // Clamp the value to [0..255].
   Cmp(input.W(), Operand(input.W(), UXTB));
   // If input < input & 0xff, it must be < 0, so saturate to 0.
   Csel(output.W(), wzr, input.W(), lt);
-  // Create a constant 0xff.
-  Mov(WTmp0(), 255);
-  // If input > input & 0xff, it must be > 255, so saturate to 255.
-  Csel(output.W(), WTmp0(), output.W(), gt);
+  // If input <= input & 0xff, it must be <= 255. Otherwise, saturate to 255.
+  Csel(output.W(), output.W(), 255, le);

[rmcilroy, 2014/02/24 11:04:49]

Could you pull out the behaviour change (changing gt to le etc.) into a separate
CL please.

[jbramley, 2014/02/24 11:59:27]

The behaviour is the same; I swapped the arguments because only the second
operand can take an immediate. I had to invert the condition code accordingly.
(When this code was written, Csel couldn't accept an Operand so we had to pass
in a register.)

 }
 
 
 void MacroAssembler::ClampInt32ToUint8(Register in_out) {
   ClampInt32ToUint8(in_out, in_out);
 }
 
 
 void MacroAssembler::ClampDoubleToUint8(Register output,
                                         DoubleRegister input,
@@ skipping 13 matching lines @@
   // Values greater than 255 have already been clamped to 255.
   Fcvtnu(output, dbl_scratch);
 }
 
 
 void MacroAssembler::CopyFieldsLoopPairsHelper(Register dst,
                                                Register src,
                                                unsigned count,
                                                Register scratch1,
                                                Register scratch2,
-                                               Register scratch3) {
+                                               Register scratch3,
+                                               Register scratch4,
+                                               Register scratch5) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in a tight loop.
-  ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3, Tmp0(), Tmp1()));
+  ASSERT(!AreAliased(dst, src,
+                     scratch1, scratch2, scratch3, scratch4, scratch5));
   ASSERT(count >= 2);
 
   const Register& remaining = scratch3;
   Mov(remaining, count / 2);
 
-  // Only use the Assembler, so we can use Tmp0() and Tmp1().
-  InstructionAccurateScope scope(this);
-
   const Register& dst_untagged = scratch1;
   const Register& src_untagged = scratch2;
-  sub(dst_untagged, dst, kHeapObjectTag);
-  sub(src_untagged, src, kHeapObjectTag);
+  Sub(dst_untagged, dst, kHeapObjectTag);
+  Sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields in pairs.
   Label loop;
-  bind(&loop);
-  ldp(Tmp0(), Tmp1(), MemOperand(src_untagged, kXRegSizeInBytes * 2,
-                                 PostIndex));
-  stp(Tmp0(), Tmp1(), MemOperand(dst_untagged, kXRegSizeInBytes * 2,
-                                 PostIndex));
-  sub(remaining, remaining, 1);
-  cbnz(remaining, &loop);
+  Bind(&loop);
+  Ldp(scratch4, scratch5,
+      MemOperand(src_untagged, kXRegSizeInBytes * 2, PostIndex));
+  Stp(scratch4, scratch5,
+      MemOperand(dst_untagged, kXRegSizeInBytes * 2, PostIndex));
+  Sub(remaining, remaining, 1);
+  Cbnz(remaining, &loop);
 
   // Handle the leftovers.
   if (count & 1) {
-    ldr(Tmp0(), MemOperand(src_untagged));
-    str(Tmp0(), MemOperand(dst_untagged));
+    Ldr(scratch4, MemOperand(src_untagged));
+    Str(scratch4, MemOperand(dst_untagged));
   }
 }
 
 
 void MacroAssembler::CopyFieldsUnrolledPairsHelper(Register dst,
                                                    Register src,
                                                    unsigned count,
                                                    Register scratch1,
-                                                   Register scratch2) {
+                                                   Register scratch2,
+                                                   Register scratch3,
+                                                   Register scratch4) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in an unrolled loop.
-  ASSERT(!AreAliased(dst, src, scratch1, scratch2, Tmp0(), Tmp1()));
-
-  // Only use the Assembler, so we can use Tmp0() and Tmp1().
-  InstructionAccurateScope scope(this);
+  ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3, scratch4));
 
   const Register& dst_untagged = scratch1;
   const Register& src_untagged = scratch2;
   sub(dst_untagged, dst, kHeapObjectTag);
   sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields in pairs.
   for (unsigned i = 0; i < count / 2; i++) {
-    ldp(Tmp0(), Tmp1(), MemOperand(src_untagged, kXRegSizeInBytes * 2,
-                                   PostIndex));
-    stp(Tmp0(), Tmp1(), MemOperand(dst_untagged, kXRegSizeInBytes * 2,
-                                   PostIndex));
+    Ldp(scratch3, scratch4,
+        MemOperand(src_untagged, kXRegSizeInBytes * 2, PostIndex));
+    Stp(scratch3, scratch4,
+        MemOperand(dst_untagged, kXRegSizeInBytes * 2, PostIndex));
   }
 
   // Handle the leftovers.
   if (count & 1) {
-    ldr(Tmp0(), MemOperand(src_untagged));
-    str(Tmp0(), MemOperand(dst_untagged));
+    Ldr(scratch3, MemOperand(src_untagged));
+    Str(scratch3, MemOperand(dst_untagged));
   }
 }
 
 
 void MacroAssembler::CopyFieldsUnrolledHelper(Register dst,
                                               Register src,
                                               unsigned count,
-                                              Register scratch1) {
+                                              Register scratch1,
+                                              Register scratch2,
+                                              Register scratch3) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in an unrolled loop.
-  ASSERT(!AreAliased(dst, src, scratch1, Tmp0(), Tmp1()));
-
-  // Only use the Assembler, so we can use Tmp0() and Tmp1().
-  InstructionAccurateScope scope(this);
+  ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3));
 
   const Register& dst_untagged = scratch1;
-  const Register& src_untagged = Tmp1();
-  sub(dst_untagged, dst, kHeapObjectTag);
-  sub(src_untagged, src, kHeapObjectTag);
+  const Register& src_untagged = scratch2;
+  Sub(dst_untagged, dst, kHeapObjectTag);
+  Sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields one by one.
   for (unsigned i = 0; i < count; i++) {
-    ldr(Tmp0(), MemOperand(src_untagged, kXRegSizeInBytes, PostIndex));
-    str(Tmp0(), MemOperand(dst_untagged, kXRegSizeInBytes, PostIndex));
+    Ldr(scratch3, MemOperand(src_untagged, kXRegSizeInBytes, PostIndex));
+    Str(scratch3, MemOperand(dst_untagged, kXRegSizeInBytes, PostIndex));
   }
 }
 
 
 void MacroAssembler::CopyFields(Register dst, Register src, CPURegList temps,
                                 unsigned count) {
   // One of two methods is used:
   //
   // For high 'count' values where many scratch registers are available:
   //    Untag src and dst into scratch registers.
   //    Copy src->dst in a tight loop.
   //
   // For low 'count' values or where few scratch registers are available:
   //    Untag src and dst into scratch registers.
   //    Copy src->dst in an unrolled loop.
   //
   // In both cases, fields are copied in pairs if possible, and left-overs are
   // handled separately.
+  ASSERT(!AreAliased(dst, src));
   ASSERT(!temps.IncludesAliasOf(dst));
   ASSERT(!temps.IncludesAliasOf(src));
-  ASSERT(!temps.IncludesAliasOf(Tmp0()));
-  ASSERT(!temps.IncludesAliasOf(Tmp1()));
   ASSERT(!temps.IncludesAliasOf(xzr));
-  ASSERT(!AreAliased(dst, src, Tmp0(), Tmp1()));
 
   if (emit_debug_code()) {
     Cmp(dst, src);
     Check(ne, kTheSourceAndDestinationAreTheSame);
   }
 
   // The value of 'count' at which a loop will be generated (if there are
   // enough scratch registers).
   static const unsigned kLoopThreshold = 8;
 
-  ASSERT(!temps.IsEmpty());
-  Register scratch1 = Register(temps.PopLowestIndex());
-  Register scratch2 = Register(temps.PopLowestIndex());
-  Register scratch3 = Register(temps.PopLowestIndex());
+  // Give all temps to the MacroAssembler.
+  UseScratchRegisterScope masm_temps(this);
+  masm_temps.Include(temps);

[rmcilroy, 2014/02/24 11:04:49]

I actually think the old approach here of popping explicitly from temps was
cleaner and more understandable (and would enable removal of The Include
method).  You could replace the methods below with something like:

CopyFieldsLoopPairsHelper(dst, src, count,
                          masm_temps.AquireX(),
                          masm_temps.AquireX(),
                          Register(extra_temps.PopLowestIndex()),
                          Register(extra_temps.PopLowestIndex()),
                          Register(extra_temps.PopLowestIndex()));

[jbramley, 2014/02/24 11:59:27]

I did it this way because if there are only two registers explicitly passed as
temps, but we happen to have three scratch registers available, we can still
take advantage of the fastest helper. Arranging it as you described is cleaner,
I agree, but it hard-codes the assumption that we have two masm scratch
registers. That might be a reasonable thing to assume, though.

Unless you say otherwise, I'll modify this as you described.

+  int tmp_count = TmpList()->Count();
 
-  if (scratch3.IsValid() && (count >= kLoopThreshold)) {
-    CopyFieldsLoopPairsHelper(dst, src, count, scratch1, scratch2, scratch3);
-  } else if (scratch2.IsValid()) {
-    CopyFieldsUnrolledPairsHelper(dst, src, count, scratch1, scratch2);
-  } else if (scratch1.IsValid()) {
-    CopyFieldsUnrolledHelper(dst, src, count, scratch1);
+  if ((tmp_count >= 5) && (count >= kLoopThreshold)) {
+    CopyFieldsLoopPairsHelper(dst, src, count,
+                              masm_temps.AcquireX(),
+                              masm_temps.AcquireX(),
+                              masm_temps.AcquireX(),
+                              masm_temps.AcquireX(),
+                              masm_temps.AcquireX());
+  } else if (tmp_count >= 4) {
+    CopyFieldsUnrolledPairsHelper(dst, src, count,
+                                  masm_temps.AcquireX(),
+                                  masm_temps.AcquireX(),
+                                  masm_temps.AcquireX(),
+                                  masm_temps.AcquireX());
+  } else if (tmp_count == 3) {
+    CopyFieldsUnrolledHelper(dst, src, count,

[jbramley, 2014/02/24 11:59:27]

It's also worth noting that since the merge, we always provide three scratch
registers to CopyFields, so CopyFieldsUnrolledHelper is now unused, and we only
need to test 'count >= kLoopThreshold' to determine which helper to call. I'll
fix that in a separate patch.

+                             masm_temps.AcquireX(),
+                             masm_temps.AcquireX(),
+                             masm_temps.AcquireX());
   } else {
     UNREACHABLE();
   }
 }
 
 
 void MacroAssembler::CopyBytes(Register dst,
                                Register src,
                                Register length,
                                Register scratch,
@@ skipping 407 matching lines @@
 
   // TODO(rmcilroy): Remove this Sxtw once the following bug is fixed:
   // https://code.google.com/p/v8/issues/detail?id=3149
   Sxtw(result, result.W());
 }
 
 
 void MacroAssembler::Prologue(PrologueFrameMode frame_mode) {
   if (frame_mode == BUILD_STUB_FRAME) {
     ASSERT(StackPointer().Is(jssp));
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
     // TODO(jbramley): Does x1 contain a JSFunction here, or does it already
     // have the special STUB smi?
-    __ Mov(Tmp0(), Operand(Smi::FromInt(StackFrame::STUB)));
+    __ Mov(temp, Operand(Smi::FromInt(StackFrame::STUB)));
     // Compiled stubs don't age, and so they don't need the predictable code
     // ageing sequence.
-    __ Push(lr, fp, cp, Tmp0());
+    __ Push(lr, fp, cp, temp);
     __ Add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp);
   } else {
     if (isolate()->IsCodePreAgingActive()) {
       Code* stub = Code::GetPreAgedCodeAgeStub(isolate());
       __ EmitCodeAgeSequence(stub);
     } else {
       __ EmitFrameSetupForCodeAgePatching();
     }
   }
 }
 
 
 void MacroAssembler::EnterFrame(StackFrame::Type type) {
   ASSERT(jssp.Is(StackPointer()));
+  UseScratchRegisterScope temps(this);
+  Register type_reg = temps.AcquireX();
+  Register code_reg = temps.AcquireX();
+
   Push(lr, fp, cp);
-  Mov(Tmp1(), Operand(Smi::FromInt(type)));
-  Mov(Tmp0(), Operand(CodeObject()));
-  Push(Tmp1(), Tmp0());
+  Mov(type_reg, Operand(Smi::FromInt(type)));
+  Mov(code_reg, Operand(CodeObject()));
+  Push(type_reg, code_reg);
   // jssp[4] : lr
   // jssp[3] : fp
   // jssp[2] : cp
   // jssp[1] : type
   // jssp[0] : code object
 
   // Adjust FP to point to saved FP.
-  add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize);
+  Add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize);
 }
 
 
 void MacroAssembler::LeaveFrame(StackFrame::Type type) {
   ASSERT(jssp.Is(StackPointer()));
   // Drop the execution stack down to the frame pointer and restore
   // the caller frame pointer and return address.
   Mov(jssp, fp);
   AssertStackConsistency();
   Pop(fp, lr);
@@ skipping 245 matching lines @@
       // Trash the registers to simulate an allocation failure.
       // We apply salt to the original zap value to easily spot the values.
       Mov(result, (kDebugZapValue & ~0xffL) | 0x11L);
       Mov(scratch1, (kDebugZapValue & ~0xffL) | 0x21L);
       Mov(scratch2, (kDebugZapValue & ~0xffL) | 0x21L);
     }
     B(gc_required);
     return;
   }
 
-  ASSERT(!AreAliased(result, scratch1, scratch2, Tmp0(), Tmp1()));
-  ASSERT(result.Is64Bits() && scratch1.Is64Bits() && scratch2.Is64Bits() &&
-         Tmp0().Is64Bits() && Tmp1().Is64Bits());
+  UseScratchRegisterScope temps(this);
+  Register scratch3 = temps.AcquireX();
+
+  ASSERT(!AreAliased(result, scratch1, scratch2, scratch3));
+  ASSERT(result.Is64Bits() && scratch1.Is64Bits() && scratch2.Is64Bits());
 
   // Make object size into bytes.
   if ((flags & SIZE_IN_WORDS) != 0) {
     object_size *= kPointerSize;
   }
   ASSERT(0 == (object_size & kObjectAlignmentMask));
 
   // Check relative positions of allocation top and limit addresses.
   // The values must be adjacent in memory to allow the use of LDP.
   ExternalReference heap_allocation_top =
       AllocationUtils::GetAllocationTopReference(isolate(), flags);
   ExternalReference heap_allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
   intptr_t top = reinterpret_cast<intptr_t>(heap_allocation_top.address());
   intptr_t limit = reinterpret_cast<intptr_t>(heap_allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
 
   // Set up allocation top address and object size registers.
   Register top_address = scratch1;
   Register allocation_limit = scratch2;
   Mov(top_address, Operand(heap_allocation_top));
 
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and the allocation limit.
     Ldp(result, allocation_limit, MemOperand(top_address));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry.
-      Ldr(Tmp0(), MemOperand(top_address));
-      Cmp(result, Tmp0());
+      Ldr(scratch3, MemOperand(top_address));
+      Cmp(result, scratch3);
       Check(eq, kUnexpectedAllocationTop);
     }
     // Load the allocation limit. 'result' already contains the allocation top.
     Ldr(allocation_limit, MemOperand(top_address, limit - top));
   }
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on A64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   // Calculate new top and bail out if new space is exhausted.
-  Adds(Tmp1(), result, object_size);
+  Adds(scratch3, result, object_size);
   B(vs, gc_required);
-  Cmp(Tmp1(), allocation_limit);
+  Cmp(scratch3, allocation_limit);
   B(hi, gc_required);
-  Str(Tmp1(), MemOperand(top_address));
+  Str(scratch3, MemOperand(top_address));
 
   // Tag the object if requested.
   if ((flags & TAG_OBJECT) != 0) {
     Orr(result, result, kHeapObjectTag);
   }
 }
 
 
 void MacroAssembler::Allocate(Register object_size,
                               Register result,
                               Register scratch1,
                               Register scratch2,
                               Label* gc_required,
                               AllocationFlags flags) {
   if (!FLAG_inline_new) {
     if (emit_debug_code()) {
       // Trash the registers to simulate an allocation failure.
       // We apply salt to the original zap value to easily spot the values.
       Mov(result, (kDebugZapValue & ~0xffL) | 0x11L);
       Mov(scratch1, (kDebugZapValue & ~0xffL) | 0x21L);
       Mov(scratch2, (kDebugZapValue & ~0xffL) | 0x21L);
     }
     B(gc_required);
     return;
   }
 
-  ASSERT(!AreAliased(object_size, result, scratch1, scratch2, Tmp0(), Tmp1()));
-  ASSERT(object_size.Is64Bits() && result.Is64Bits() && scratch1.Is64Bits() &&
-         scratch2.Is64Bits() && Tmp0().Is64Bits() && Tmp1().Is64Bits());
+  UseScratchRegisterScope temps(this);
+  Register scratch3 = temps.AcquireX();
+
+  ASSERT(!AreAliased(object_size, result, scratch1, scratch2, scratch3));
+  ASSERT(object_size.Is64Bits() && result.Is64Bits() &&
+         scratch1.Is64Bits() && scratch2.Is64Bits());
 
   // Check relative positions of allocation top and limit addresses.
   // The values must be adjacent in memory to allow the use of LDP.
   ExternalReference heap_allocation_top =
       AllocationUtils::GetAllocationTopReference(isolate(), flags);
   ExternalReference heap_allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
   intptr_t top = reinterpret_cast<intptr_t>(heap_allocation_top.address());
   intptr_t limit = reinterpret_cast<intptr_t>(heap_allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
 
   // Set up allocation top address and object size registers.
   Register top_address = scratch1;
   Register allocation_limit = scratch2;
   Mov(top_address, Operand(heap_allocation_top));
 
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and the allocation limit.
     Ldp(result, allocation_limit, MemOperand(top_address));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry.
-      Ldr(Tmp0(), MemOperand(top_address));
-      Cmp(result, Tmp0());
+      Ldr(scratch3, MemOperand(top_address));
+      Cmp(result, scratch3);
       Check(eq, kUnexpectedAllocationTop);
     }
     // Load the allocation limit. 'result' already contains the allocation top.
     Ldr(allocation_limit, MemOperand(top_address, limit - top));
   }
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on A64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   // Calculate new top and bail out if new space is exhausted
   if ((flags & SIZE_IN_WORDS) != 0) {
-    Adds(Tmp1(), result, Operand(object_size, LSL, kPointerSizeLog2));
+    Adds(scratch3, result, Operand(object_size, LSL, kPointerSizeLog2));
   } else {
-    Adds(Tmp1(), result, object_size);
+    Adds(scratch3, result, object_size);
   }
 
   if (emit_debug_code()) {
-    Tst(Tmp1(), kObjectAlignmentMask);
+    Tst(scratch3, kObjectAlignmentMask);
     Check(eq, kUnalignedAllocationInNewSpace);
   }
 
   B(vs, gc_required);
-  Cmp(Tmp1(), allocation_limit);
+  Cmp(scratch3, allocation_limit);
   B(hi, gc_required);
-  Str(Tmp1(), MemOperand(top_address));
+  Str(scratch3, MemOperand(top_address));
 
   // Tag the object if requested.
   if ((flags & TAG_OBJECT) != 0) {
     Orr(result, result, kHeapObjectTag);
   }
 }
 
 
 void MacroAssembler::UndoAllocationInNewSpace(Register object,
                                               Register scratch) {
@@ skipping 307 matching lines @@
   }
   Ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   Cmp(scratch, Operand(map));
   B(ne, &fail);
   Jump(success, RelocInfo::CODE_TARGET);
   Bind(&fail);
 }
 
 
 void MacroAssembler::TestMapBitfield(Register object, uint64_t mask) {
-  Ldr(Tmp0(), FieldMemOperand(object, HeapObject::kMapOffset));
-  Ldrb(Tmp0(), FieldMemOperand(Tmp0(), Map::kBitFieldOffset));
-  Tst(Tmp0(), mask);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
+  Ldrb(temp, FieldMemOperand(temp, Map::kBitFieldOffset));
+  Tst(temp, mask);
 }
 
 
 void MacroAssembler::LoadElementsKind(Register result, Register object) {
   // Load map.
   __ Ldr(result, FieldMemOperand(object, HeapObject::kMapOffset));
   // Load the map's "bit field 2".
   __ Ldrb(result, FieldMemOperand(result, Map::kBitField2Offset));
   // Retrieve elements_kind from bit field 2.
   __ Ubfx(result, result, Map::kElementsKindShift, Map::kElementsKindBitCount);
@@ skipping 51 matching lines @@
   Bind(&non_instance);
   Ldr(result, FieldMemOperand(result, Map::kConstructorOffset));
 
   // All done.
   Bind(&done);
 }
 
 
 void MacroAssembler::CompareRoot(const Register& obj,
                                  Heap::RootListIndex index) {
-  ASSERT(!AreAliased(obj, Tmp0()));
-  LoadRoot(Tmp0(), index);
-  Cmp(obj, Tmp0());
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  ASSERT(!AreAliased(obj, temp));
+  LoadRoot(temp, index);
+  Cmp(obj, temp);
 }
 
 
 void MacroAssembler::JumpIfRoot(const Register& obj,
                                 Heap::RootListIndex index,
                                 Label* if_equal) {
   CompareRoot(obj, index);
   B(eq, if_equal);
 }
 
@@ skipping 176 matching lines @@
   Cmp(index, index_type == kIndexIsSmi ? scratch : Operand::UntagSmi(scratch));
   Check(lt, kIndexIsTooLarge);
 
   ASSERT_EQ(0, Smi::FromInt(0));
   Cmp(index, 0);
   Check(ge, kIndexIsNegative);
 }
 
 
 void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
-                                            Register scratch,
+                                            Register scratch1,
+                                            Register scratch2,
                                             Label* miss) {
-  // TODO(jbramley): Sort out the uses of Tmp0() and Tmp1() in this function.
-  // The ARM version takes two scratch registers, and that should be enough for
-  // all of the checks.
-
+  ASSERT(!AreAliased(holder_reg, scratch1, scratch2));
   Label same_contexts;
 
-  ASSERT(!AreAliased(holder_reg, scratch));
-
   // Load current lexical context from the stack frame.
-  Ldr(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
+  Ldr(scratch1, MemOperand(fp, StandardFrameConstants::kContextOffset));
   // In debug mode, make sure the lexical context is set.
 #ifdef DEBUG
-  Cmp(scratch, 0);
+  Cmp(scratch1, 0);
   Check(ne, kWeShouldNotHaveAnEmptyLexicalContext);
 #endif
 
   // Load the native context of the current context.
   int offset =
       Context::kHeaderSize + Context::GLOBAL_OBJECT_INDEX * kPointerSize;
-  Ldr(scratch, FieldMemOperand(scratch, offset));
-  Ldr(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+  Ldr(scratch1, FieldMemOperand(scratch1, offset));
+  Ldr(scratch1, FieldMemOperand(scratch1, GlobalObject::kNativeContextOffset));
 
   // Check the context is a native context.
   if (emit_debug_code()) {
     // Read the first word and compare to the global_context_map.
-    Register temp = Tmp1();
-    Ldr(temp, FieldMemOperand(scratch, HeapObject::kMapOffset));
-    CompareRoot(temp, Heap::kNativeContextMapRootIndex);
+    Ldr(scratch2, FieldMemOperand(scratch1, HeapObject::kMapOffset));
+    CompareRoot(scratch2, Heap::kNativeContextMapRootIndex);
     Check(eq, kExpectedNativeContext);
   }
 
   // Check if both contexts are the same.
-  ldr(Tmp0(), FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
-  cmp(scratch, Tmp0());
-  b(&same_contexts, eq);
+  Ldr(scratch2, FieldMemOperand(holder_reg,
+                                JSGlobalProxy::kNativeContextOffset));
+  Cmp(scratch1, scratch2);
+  B(&same_contexts, eq);
 
   // Check the context is a native context.
   if (emit_debug_code()) {
-    // Move Tmp0() into a different register, as CompareRoot will use it.
-    Register temp = Tmp1();
-    mov(temp, Tmp0());
-    CompareRoot(temp, Heap::kNullValueRootIndex);
+    // We're short on scratch registers here, so use holder_reg as a scratch.
+    Push(holder_reg);
+    Register scratch3 = holder_reg;
+
+    CompareRoot(scratch2, Heap::kNullValueRootIndex);
     Check(ne, kExpectedNonNullContext);
 
-    Ldr(temp, FieldMemOperand(temp, HeapObject::kMapOffset));
-    CompareRoot(temp, Heap::kNativeContextMapRootIndex);
+    Ldr(scratch3, FieldMemOperand(scratch2, HeapObject::kMapOffset));
+    CompareRoot(scratch3, Heap::kNativeContextMapRootIndex);
     Check(eq, kExpectedNativeContext);
-
-    // Let's consider that Tmp0() has been cloberred by the MacroAssembler.
-    // We reload it with its value.
-    ldr(Tmp0(), FieldMemOperand(holder_reg,
-                                JSGlobalProxy::kNativeContextOffset));
+    Pop(holder_reg);
   }
 
   // Check that the security token in the calling global object is
   // compatible with the security token in the receiving global
   // object.
   int token_offset = Context::kHeaderSize +
                      Context::SECURITY_TOKEN_INDEX * kPointerSize;
 
-  ldr(scratch, FieldMemOperand(scratch, token_offset));
-  ldr(Tmp0(), FieldMemOperand(Tmp0(), token_offset));
-  cmp(scratch, Tmp0());
-  b(miss, ne);
+  Ldr(scratch1, FieldMemOperand(scratch1, token_offset));
+  Ldr(scratch2, FieldMemOperand(scratch2, token_offset));
+  Cmp(scratch1, scratch2);
+  B(miss, ne);
 
-  bind(&same_contexts);
+  Bind(&same_contexts);
 }
 
 
 // Compute the hash code from the untagged key. This must be kept in sync with
 // ComputeIntegerHash in utils.h and KeyedLoadGenericElementStub in
 // code-stub-hydrogen.cc
 void MacroAssembler::GetNumberHash(Register key, Register scratch) {
   ASSERT(!AreAliased(key, scratch));
 
   // Xor original key with a seed.
@@ skipping 82 matching lines @@
 
   // Get the value at the masked, scaled index and return.
   const int kValueOffset =
       SeededNumberDictionary::kElementsStartOffset + kPointerSize;
   Ldr(result, FieldMemOperand(scratch2, kValueOffset));
 }
 
 
 void MacroAssembler::RememberedSetHelper(Register object,  // For debug tests.
                                          Register address,
-                                         Register scratch,
+                                         Register scratch1,
+                                         Register scratch2,
                                          SaveFPRegsMode fp_mode,
                                          RememberedSetFinalAction and_then) {
-  ASSERT(!AreAliased(object, address, scratch));
+  ASSERT(!AreAliased(object, address, scratch1));
   Label done, store_buffer_overflow;
   if (emit_debug_code()) {
+    UseScratchRegisterScope temps(this);
+    temps.Include(scratch1, scratch2);

[rmcilroy, 2014/02/24 11:04:49]

nit - is this Include really required here?

[jbramley, 2014/02/24 11:59:27]

Yes, I'm afraid so. JumpIfNotInNewSpace needs some scratch registers, but in
some contexts we've used them all up. It's a little irritating that we have to
do this, but I think this is the only case where it's required.

+
     Label ok;
     JumpIfNotInNewSpace(object, &ok);
     Abort(kRememberedSetPointerInNewSpace);
     bind(&ok);
   }
   // Load store buffer top.
-  Mov(Tmp0(), Operand(ExternalReference::store_buffer_top(isolate())));
-  Ldr(scratch, MemOperand(Tmp0()));
+  Mov(scratch2, Operand(ExternalReference::store_buffer_top(isolate())));
+  Ldr(scratch1, MemOperand(scratch2));
   // Store pointer to buffer and increment buffer top.
-  Str(address, MemOperand(scratch, kPointerSize, PostIndex));
+  Str(address, MemOperand(scratch1, kPointerSize, PostIndex));
   // Write back new top of buffer.
-  Str(scratch, MemOperand(Tmp0()));
+  Str(scratch1, MemOperand(scratch2));
   // Call stub on end of buffer.
   // Check for end of buffer.
   ASSERT(StoreBuffer::kStoreBufferOverflowBit ==
          (1 << (14 + kPointerSizeLog2)));
   if (and_then == kFallThroughAtEnd) {
-    Tbz(scratch, (14 + kPointerSizeLog2), &done);
+    Tbz(scratch1, (14 + kPointerSizeLog2), &done);
   } else {
     ASSERT(and_then == kReturnAtEnd);
-    Tbnz(scratch, (14 + kPointerSizeLog2), &store_buffer_overflow);
+    Tbnz(scratch1, (14 + kPointerSizeLog2), &store_buffer_overflow);
     Ret();
   }
 
   Bind(&store_buffer_overflow);
   Push(lr);
   StoreBufferOverflowStub store_buffer_overflow_stub =
       StoreBufferOverflowStub(fp_mode);
   CallStub(&store_buffer_overflow_stub);
   Pop(lr);
 
@@ skipping 127 matching lines @@
 
   // Clobber clobbered input registers when running with the debug-code flag
   // turned on to provoke errors.
   if (emit_debug_code()) {
     Mov(value, Operand(BitCast<int64_t>(kZapValue + 4)));
     Mov(scratch, Operand(BitCast<int64_t>(kZapValue + 8)));
   }
 }
 
 
-// Will clobber: object, address, value, Tmp0(), Tmp1().
+// Will clobber: object, address, value.
 // If lr_status is kLRHasBeenSaved, lr will also be clobbered.
 //
 // The register 'object' contains a heap object pointer. The heap object tag is
 // shifted away.
 void MacroAssembler::RecordWrite(Register object,
                                  Register address,
                                  Register value,
                                  LinkRegisterStatus lr_status,
                                  SaveFPRegsMode fp_mode,
                                  RememberedSetAction remembered_set_action,
                                  SmiCheck smi_check) {
   ASM_LOCATION("MacroAssembler::RecordWrite");
   ASSERT(!AreAliased(object, value));
 
   if (emit_debug_code()) {
-    Ldr(Tmp0(), MemOperand(address));
-    Cmp(Tmp0(), value);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+
+    Ldr(temp, MemOperand(address));
+    Cmp(temp, value);
     Check(eq, kWrongAddressOrValuePassedToRecordWrite);
   }
 
   // Count number of write barriers in generated code.
   isolate()->counters()->write_barriers_static()->Increment();
   // TODO(mstarzinger): Dynamic counter missing.
 
   // First, check if a write barrier is even needed. The tests below
   // catch stores of smis and stores into the young generation.
   Label done;
@@ skipping 44 matching lines @@
     Tbz(reg, 1, &color_is_valid);
     Abort(kUnexpectedColorFound);
     Bind(&color_is_valid);
   }
 }
 
 
 void MacroAssembler::GetMarkBits(Register addr_reg,
                                  Register bitmap_reg,
                                  Register shift_reg) {
-  ASSERT(!AreAliased(addr_reg, bitmap_reg, shift_reg, no_reg));
+  ASSERT(!AreAliased(addr_reg, bitmap_reg, shift_reg));
+  ASSERT(addr_reg.Is64Bits() && bitmap_reg.Is64Bits() && shift_reg.Is64Bits());
   // addr_reg is divided into fields:
   // |63        page base        20|19    high      8|7   shift   3|2  0|
   // 'high' gives the index of the cell holding color bits for the object.
   // 'shift' gives the offset in the cell for this object's color.
   const int kShiftBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;
-  Ubfx(Tmp0(), addr_reg, kShiftBits, kPageSizeBits - kShiftBits);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Ubfx(temp, addr_reg, kShiftBits, kPageSizeBits - kShiftBits);
   Bic(bitmap_reg, addr_reg, Page::kPageAlignmentMask);
-  Add(bitmap_reg, bitmap_reg, Operand(Tmp0(), LSL, Bitmap::kBytesPerCellLog2));
+  Add(bitmap_reg, bitmap_reg, Operand(temp, LSL, Bitmap::kBytesPerCellLog2));
   // bitmap_reg:
   // |63        page base        20|19 zeros 15|14      high      3|2  0|
   Ubfx(shift_reg, addr_reg, kPointerSizeLog2, Bitmap::kBitsPerCellLog2);
 }
 
 
 void MacroAssembler::HasColor(Register object,
                               Register bitmap_scratch,
                               Register shift_scratch,
                               Label* has_color,
@@ skipping 203 matching lines @@
 void MacroAssembler::AssertRegisterIsClear(Register reg, BailoutReason reason) {
   if (emit_debug_code()) {
     CheckRegisterIsClear(reg, reason);
   }
 }
 
 
 void MacroAssembler::AssertRegisterIsRoot(Register reg,
                                           Heap::RootListIndex index,
                                           BailoutReason reason) {
-  // CompareRoot uses Tmp0().
-  ASSERT(!reg.Is(Tmp0()));
   if (emit_debug_code()) {
     CompareRoot(reg, index);
     Check(eq, reason);
   }
 }
 
 
 void MacroAssembler::AssertFastElements(Register elements) {
   if (emit_debug_code()) {
-    Register temp = Tmp1();
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
     Label ok;
     Ldr(temp, FieldMemOperand(elements, HeapObject::kMapOffset));
     JumpIfRoot(temp, Heap::kFixedArrayMapRootIndex, &ok);
     JumpIfRoot(temp, Heap::kFixedDoubleArrayMapRootIndex, &ok);
     JumpIfRoot(temp, Heap::kFixedCOWArrayMapRootIndex, &ok);
     Abort(kJSObjectWithFastElementsMapHasSlowElements);
     Bind(&ok);
   }
 }
 
 
 void MacroAssembler::AssertIsString(const Register& object) {
   if (emit_debug_code()) {
-    Register temp = Tmp1();
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
     STATIC_ASSERT(kSmiTag == 0);
     Tst(object, Operand(kSmiTagMask));
     Check(ne, kOperandIsNotAString);
     Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
     CompareInstanceType(temp, temp, FIRST_NONSTRING_TYPE);
     Check(lo, kOperandIsNotAString);
   }
 }
 
 
@@ skipping 26 matching lines @@
   }
 #endif
 
   // Abort is used in some contexts where csp is the stack pointer. In order to
   // simplify the CallRuntime code, make sure that jssp is the stack pointer.
   // There is no risk of register corruption here because Abort doesn't return.
   Register old_stack_pointer = StackPointer();
   SetStackPointer(jssp);
   Mov(jssp, old_stack_pointer);
 
+  // We need some scratch registers for the MacroAssembler, so make sure we have
+  // some. This is safe here because Abort never returns.
+  RegList old_tmp_list = TmpList()->list();
+  TmpList()->Combine(ip0);
+  TmpList()->Combine(ip1);
+
   if (use_real_aborts()) {
     // Avoid infinite recursion; Push contains some assertions that use Abort.
     NoUseRealAbortsScope no_real_aborts(this);
 
     Mov(x0, Operand(Smi::FromInt(reason)));
     Push(x0);
 
     if (!has_frame_) {
       // We don't actually want to generate a pile of code for this, so just
       // claim there is a stack frame, without generating one.
@@ skipping 16 matching lines @@
 
     // Emit the message string directly in the instruction stream.
     {
       BlockConstPoolScope scope(this);
       Bind(&msg_address);
       EmitStringData(GetBailoutReason(reason));
     }
   }
 
   SetStackPointer(old_stack_pointer);
+  TmpList()->set_list(old_tmp_list);
 }
 
 
 void MacroAssembler::LoadTransitionedArrayMapConditional(
     ElementsKind expected_kind,
     ElementsKind transitioned_kind,
     Register map_in_out,
-    Register scratch,
+    Register scratch1,
+    Register scratch2,
     Label* no_map_match) {
   // Load the global or builtins object from the current context.
-  Ldr(scratch, GlobalObjectMemOperand());
-  Ldr(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+  Ldr(scratch1, GlobalObjectMemOperand());
+  Ldr(scratch1, FieldMemOperand(scratch1, GlobalObject::kNativeContextOffset));
 
   // Check that the function's map is the same as the expected cached map.
-  Ldr(scratch, ContextMemOperand(scratch, Context::JS_ARRAY_MAPS_INDEX));
+  Ldr(scratch1, ContextMemOperand(scratch1, Context::JS_ARRAY_MAPS_INDEX));
   size_t offset = (expected_kind * kPointerSize) + FixedArrayBase::kHeaderSize;
-  Ldr(Tmp0(), FieldMemOperand(scratch, offset));
-  Cmp(map_in_out, Tmp0());
+  Ldr(scratch2, FieldMemOperand(scratch1, offset));
+  Cmp(map_in_out, scratch2);
   B(ne, no_map_match);
 
   // Use the transitioned cached map.
   offset = (transitioned_kind * kPointerSize) + FixedArrayBase::kHeaderSize;
-  Ldr(map_in_out, FieldMemOperand(scratch, offset));
+  Ldr(map_in_out, FieldMemOperand(scratch1, offset));
 }
 
 
 void MacroAssembler::LoadInitialArrayMap(Register function_in,
-                                         Register scratch,
+                                         Register scratch1,
+                                         Register scratch2,
                                          Register map_out,
                                          ArrayHasHoles holes) {
-  ASSERT(!AreAliased(function_in, scratch, map_out));
+  ASSERT(!AreAliased(function_in, scratch1, scratch2, map_out));
   Label done;
   Ldr(map_out, FieldMemOperand(function_in,
                                JSFunction::kPrototypeOrInitialMapOffset));
 
   if (!FLAG_smi_only_arrays) {
     ElementsKind kind = (holes == kArrayCanHaveHoles) ? FAST_HOLEY_ELEMENTS
                                                       : FAST_ELEMENTS;
     LoadTransitionedArrayMapConditional(FAST_SMI_ELEMENTS, kind, map_out,
-                                        scratch, &done);
+                                        scratch1, scratch2, &done);
   } else if (holes == kArrayCanHaveHoles) {
     LoadTransitionedArrayMapConditional(FAST_SMI_ELEMENTS,
                                         FAST_HOLEY_SMI_ELEMENTS, map_out,
-                                        scratch, &done);
+                                        scratch1, scratch2, &done);
   }
   Bind(&done);
 }
 
 
 void MacroAssembler::LoadArrayFunction(Register function) {
   // Load the global or builtins object from the current context.
   Ldr(function, GlobalObjectMemOperand());
   // Load the global context from the global or builtins object.
   Ldr(function,
@@ skipping 34 matching lines @@
 // PrintfNoPreserve after setting up one or more PreserveRegisterScopes.
 void MacroAssembler::PrintfNoPreserve(const char * format,
                                       const CPURegister& arg0,
                                       const CPURegister& arg1,
                                       const CPURegister& arg2,
                                       const CPURegister& arg3) {
   // We cannot handle a caller-saved stack pointer. It doesn't make much sense
   // in most cases anyway, so this restriction shouldn't be too serious.
   ASSERT(!kCallerSaved.IncludesAliasOf(__ StackPointer()));
 
-  // We cannot print Tmp0() or Tmp1() as they're used internally by the macro
-  // assembler. We cannot print the stack pointer because it is typically used
-  // to preserve caller-saved registers (using other Printf variants which
-  // depend on this helper).
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg0));
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg1));
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg2));
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg3));
+  // Make sure that the macro assembler doesn't try to use any of our arguments
+  // as scratch registers.
+  UseScratchRegisterScope temps(this);
+  temps.Exclude(arg0, arg1, arg2, arg3);
+
+  // We cannot print the stack pointer because it is typically used to preserve
+  // caller-saved registers (using other Printf variants which depend on this
+  // helper).
+  ASSERT(!AreAliased(arg0, StackPointer()));
+  ASSERT(!AreAliased(arg1, StackPointer()));
+  ASSERT(!AreAliased(arg2, StackPointer()));
+  ASSERT(!AreAliased(arg3, StackPointer()));
 
   static const int kMaxArgCount = 4;
   // Assume that we have the maximum number of arguments until we know
   // otherwise.
   int arg_count = kMaxArgCount;
 
   // The provided arguments.
   CPURegister args[kMaxArgCount] = {arg0, arg1, arg2, arg3};
 
   // The PCS registers where the arguments need to end up.
@@ skipping 121 matching lines @@
   Call(FUNCTION_ADDR(printf), RelocInfo::EXTERNAL_REFERENCE);
 #endif
 }
 
 
 void MacroAssembler::Printf(const char * format,
                             const CPURegister& arg0,
                             const CPURegister& arg1,
                             const CPURegister& arg2,
                             const CPURegister& arg3) {
+  // Printf is expected to preserve all registers, so make sure that none are
+  // available as scratch registers until we've preserved them.
+  UseScratchRegisterScope exclude_all(this);
+  exclude_all.ExcludeAll();

[rmcilroy, 2014/02/24 11:04:49]

Can't we just simplify this to assert that arg0, arg1, etc are not members of
the available tmplist, and just acquire a temp from that list when required by
this function?

[jbramley, 2014/02/24 11:59:27]

Perhaps, but this way allows us to call Printf on allocatable scratch registers.
That might not matter in any sensible usage, but Printf is like a big hammer; it
should always work when you're trying to debug weird things, even if you
wouldn't call it in that way in normal code.

As a side-note, the only registers than we cannot Printf are StackPointer() and
csp. (I have a plan for printing those too, as that might be useful at times.)

Also, using the APIs that exist at the moment, it would take four separate
checks to assert that arg0-3 aren't in the TmpList():

ASSERT(arg0.IsNone() || !TmpList()->IncludesAliasOf(arg0));
...

We could change that, of course.

+
   // Preserve all caller-saved registers as well as NZCV.
   // If csp is the stack pointer, PushCPURegList asserts that the size of each
   // list is a multiple of 16 bytes.
   PushCPURegList(kCallerSaved);
   PushCPURegList(kCallerSavedFP);
-  // Use Tmp0() as a scratch register. It is not accepted by Printf so it will
-  // never overlap an argument register.
-  Mrs(Tmp0(), NZCV);
-  Push(Tmp0(), xzr);
 
-  PrintfNoPreserve(format, arg0, arg1, arg2, arg3);
+  { UseScratchRegisterScope temps(this);
+    // We can use caller-saved registers as scratch values (except for argN).
+    TmpList()->Combine(kCallerSaved);
+    FPTmpList()->Combine(kCallerSavedFP);
+    temps.Exclude(arg0, arg1, arg2, arg3);
 
-  Pop(xzr, Tmp0());
-  Msr(NZCV, Tmp0());
+    // Preserve NZCV.
+    Register tmp = temps.AcquireX();
+    Mrs(tmp, NZCV);
+    Push(tmp, xzr);
+
+    PrintfNoPreserve(format, arg0, arg1, arg2, arg3);
+
+    Pop(xzr, tmp);
+    Msr(NZCV, tmp);
+  }
+
   PopCPURegList(kCallerSavedFP);
   PopCPURegList(kCallerSaved);
 }
 
 
 void MacroAssembler::EmitFrameSetupForCodeAgePatching() {
   // TODO(jbramley): Other architectures use the internal memcpy to copy the
   // sequence. If this is a performance bottleneck, we should consider caching
   // the sequence and copying it in the same way.
   InstructionAccurateScope scope(this, kCodeAgeSequenceSize / kInstructionSize);
@@ skipping 87 matching lines @@
     PatchingAssembler patcher(old, length);
     MacroAssembler::EmitCodeAgeSequence(&patcher, NULL);
     initialized = true;
   }
   return memcmp(sequence, old, kCodeAgeStubEntryOffset) == 0;
 }
 #endif
 
 
 #undef __
+
+
+UseScratchRegisterScope::~UseScratchRegisterScope() {
+  available_->set_list(old_available_);
+  availablefp_->set_list(old_availablefp_);
+}
+
+
+Register UseScratchRegisterScope::AcquireSameSizeAs(const Register& reg) {
+  int code = AcquireNextAvailable(available_).code();
+  return Register::Create(code, reg.SizeInBits());
+}
+
+
+FPRegister UseScratchRegisterScope::AcquireSameSizeAs(const FPRegister& reg) {
+  int code = AcquireNextAvailable(availablefp_).code();
+  return FPRegister::Create(code, reg.SizeInBits());
+}
+
+
+void UseScratchRegisterScope::Release(const CPURegister& reg) {
+  if (reg.IsRegister()) {
+    ReleaseByCode(available_, reg.code());
+  } else if (reg.IsFPRegister()) {
+    ReleaseByCode(availablefp_, reg.code());
+  } else {
+    ASSERT(reg.IsNone());
+  }
+}
+
+
+void UseScratchRegisterScope::Include(const CPURegList& regs) {

[rmcilroy, 2014/02/24 11:04:49]

Having had another look through the code, it seems that the Exclude methods are
only used in PrintF, and the Include functions are only used in
MacroAssembler::CopyFields and MacroAssembler::RememberSetHelper neither of
which I think requires the use of a UseScratchRegisterScope (see comments on
these occurrences for details).  I would really like it if we simplify this
class to avoid having Include/Exclude methods and only enable scoping of the
TempRegister lists. This would fit much better with the nice scope based design
of the class in its intended use and avoid confusion and subtle bugs if
registers were incorrectly included in the tmp list.

Would it be possible to remove the Include/Exclude methods or did you have other
use-cases for Include/Exclude in the future?

[jbramley, 2014/02/24 11:59:27]

They're useful in tests (such as Dump), but there aren't many cases where we
need to explicitly exclude registers. Most of the time, if we need to use a
specific register, it's because we're calling a function. We _could_ go
over-the-top and Exclude the arguments registers (x0, ...) in those cases, to be
safe, but such an invasive change is almost certainly not worthwhile.

Regarding incorrect use: It is true that modifications to TmpList() will be
reverted when a scope exits, even if a caller started the scope, but we thought
that was the correct behaviour. What accidental use-case did you think of?

Also, even if I remove Include and Exclude, the same behaviour could be achieved
by directly manipulating TmpList(), but I don't want to encourage that.

[rmcilroy, 2014/02/24 13:12:49]

The accidental use-case I'm thinking of is something along the lines of code
which adds a random register to a scratch register scope, does some work, then
accidentally uses that same register thinking it's free (either within the same
scope, or a further scope of a called MacroAssembler method).  E.g.:

MacroAssembler::bar(... Register scratch) {
  // load scratch1
  Mov(x1, MemOperand...) // clobbers scratch1
  // use scratch1
}

MacroAssembler::foo() {
  UseScratchRegisterScope tmps(this);
  tmps.Include(scratch1);
  // ...
  bar(..., scratch1);  // mistakenly think scratch1 is free
}

I realise the use of scratch1 after including it in the UseScratchRegisterScope
in foo is incorrect, but I could see something like this easily being
accidentally introduced via copy/pasted code or in extra long scopes where it's
not obvious which temps are available.
  
Sure anything's possible by manipulating TmpList, but as you say we don't want
to encourage this, and Include/Exclude encourage this  manipulation of the
available scratch registers :).

+  RegList include = regs.list();
+  CPURegister::RegisterType type = regs.type();
+
+  if (type == CPURegister::kRegister) {
+    // Make sure that neither csp nor xzr are included the list.
+    include &= ~(xzr.Bit() | csp.Bit());

[rmcilroy, 2014/02/20 13:06:00]

Maybe add an assert here too to warn if someone tries to add them?

[jbramley, 2014/02/20 13:23:12]

My reasoning was that in several MacroAssembler operations, we can treat the
result as a scratch register (as long as it's not an input):

temps.Include(rd);
temps.Exclude(rn, rm);

However, rd can be csp in most cases. So as not to complicate the logic in these
operations, I thought it best to just ignore them, so we can do
temps.Include(rd) without having to check that it's not csp.

Note that I haven't actually made that optimisation; at the moment it isn't
necessary, and this patch is big enough already. Would you prefer that I put the
assertion in now, and then remove it later if necessary?

[rmcilroy, 2014/02/24 11:04:49]

As outlined above, I would like it if this method could be removed entirely, but
if that's not possible I would prefer that the assertion is added here now and
removed later if required.

+    IncludeByRegList(available_, include);
+  } else if (type == CPURegister::kFPRegister) {
+    IncludeByRegList(availablefp_, include);
+  } else {
+    ASSERT(type == CPURegister::kNoRegister);
+  }
+}
+
+
+void UseScratchRegisterScope::Include(const Register& reg1,
+                                      const Register& reg2,
+                                      const Register& reg3,
+                                      const Register& reg4) {
+  RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit();
+  // Make sure that neither csp nor xzr are included the list.
+  include &= ~(xzr.Bit() | csp.Bit());
+
+  IncludeByRegList(available_, include);
+}
+
+
+void UseScratchRegisterScope::Include(const FPRegister& reg1,
+                                      const FPRegister& reg2,
+                                      const FPRegister& reg3,
+                                      const FPRegister& reg4) {
+  RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit();
+  IncludeByRegList(availablefp_, include);
+}
+
+
+void UseScratchRegisterScope::Exclude(const Register& reg1,
+                                      const Register& reg2,
+                                      const Register& reg3,
+                                      const Register& reg4) {
+  RegList exclude = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit();
+  ExcludeByRegList(available_, exclude);
+}
+
+
+void UseScratchRegisterScope::Exclude(const FPRegister& reg1,
+                                      const FPRegister& reg2,
+                                      const FPRegister& reg3,
+                                      const FPRegister& reg4) {
+  RegList excludefp = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit();
+  ExcludeByRegList(availablefp_, excludefp);
+}
+
+
+void UseScratchRegisterScope::Exclude(const CPURegister& reg1,
+                                      const CPURegister& reg2,
+                                      const CPURegister& reg3,
+                                      const CPURegister& reg4) {
+  RegList exclude = 0;
+  RegList excludefp = 0;
+
+  const CPURegister regs[] = {reg1, reg2, reg3, reg4};
+
+  for (unsigned i = 0; i < (sizeof(regs) / sizeof(regs[0])); i++) {
+    if (regs[i].IsRegister()) {
+      exclude |= regs[i].Bit();
+    } else if (regs[i].IsFPRegister()) {
+      excludefp |= regs[i].Bit();
+    } else {
+      ASSERT(regs[i].IsNone());
+    }
+  }
+
+  ExcludeByRegList(available_, exclude);
+  ExcludeByRegList(availablefp_, excludefp);
+}
+
+
+void UseScratchRegisterScope::ExcludeAll() {
+  ExcludeByRegList(available_, available_->list());
+  ExcludeByRegList(availablefp_, availablefp_->list());
+}
+
+
+CPURegister UseScratchRegisterScope::AcquireNextAvailable(
+    CPURegList* available) {
+  CHECK(!available->IsEmpty());
+  CPURegister result = available->PopLowestIndex();
+  ASSERT(!AreAliased(result, xzr, csp));
+  return result;
+}
+
+
+void UseScratchRegisterScope::ReleaseByCode(CPURegList* available, int code) {
+  ReleaseByRegList(available, static_cast<RegList>(1) << code);
+}
+
+
+void UseScratchRegisterScope::ReleaseByRegList(CPURegList* available,
+                                               RegList regs) {
+  available->set_list(available->list() | regs);
+}
+
+
+void UseScratchRegisterScope::IncludeByRegList(CPURegList* available,
+                                               RegList regs) {
+  available->set_list(available->list() | regs);
+}
+
+
+void UseScratchRegisterScope::ExcludeByRegList(CPURegList* available,
+                                               RegList exclude) {
+  available->set_list(available->list() & ~exclude);
+}
+
+
 #define __ masm->
 
 
 void InlineSmiCheckInfo::Emit(MacroAssembler* masm, const Register& reg,
                               const Label* smi_check) {
   Assembler::BlockConstPoolScope scope(masm);
   if (reg.IsValid()) {
     ASSERT(smi_check->is_bound());
     ASSERT(reg.Is64Bits());
 
@@ skipping 31 matching lines @@
   }
 }
 
 
 #undef __
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64