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Issue 1647803004: Move base to DEPS (Closed) Base URL: git@github.com:domokit/mojo.git@master
Patch Set: Created 4 years, 10 months ago
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1 // Copyright (c) 2012 The Chromium Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 // For atomic operations on reference counts, see atomic_refcount.h.
6 // For atomic operations on sequence numbers, see atomic_sequence_num.h.
7
8 // The routines exported by this module are subtle. If you use them, even if
9 // you get the code right, it will depend on careful reasoning about atomicity
10 // and memory ordering; it will be less readable, and harder to maintain. If
11 // you plan to use these routines, you should have a good reason, such as solid
12 // evidence that performance would otherwise suffer, or there being no
13 // alternative. You should assume only properties explicitly guaranteed by the
14 // specifications in this file. You are almost certainly _not_ writing code
15 // just for the x86; if you assume x86 semantics, x86 hardware bugs and
16 // implementations on other archtectures will cause your code to break. If you
17 // do not know what you are doing, avoid these routines, and use a Mutex.
18 //
19 // It is incorrect to make direct assignments to/from an atomic variable.
20 // You should use one of the Load or Store routines. The NoBarrier
21 // versions are provided when no barriers are needed:
22 // NoBarrier_Store()
23 // NoBarrier_Load()
24 // Although there are currently no compiler enforcement, you are encouraged
25 // to use these.
26 //
27
28 #ifndef BASE_ATOMICOPS_H_
29 #define BASE_ATOMICOPS_H_
30
31 #include <stdint.h>
32
33 // Small C++ header which defines implementation specific macros used to
34 // identify the STL implementation.
35 // - libc++: captures __config for _LIBCPP_VERSION
36 // - libstdc++: captures bits/c++config.h for __GLIBCXX__
37 #include <cstddef>
38
39 #include "base/base_export.h"
40 #include "build/build_config.h"
41
42 #if defined(OS_WIN) && defined(ARCH_CPU_64_BITS)
43 // windows.h #defines this (only on x64). This causes problems because the
44 // public API also uses MemoryBarrier at the public name for this fence. So, on
45 // X64, undef it, and call its documented
46 // (http://msdn.microsoft.com/en-us/library/windows/desktop/ms684208.aspx)
47 // implementation directly.
48 #undef MemoryBarrier
49 #endif
50
51 namespace base {
52 namespace subtle {
53
54 typedef int32_t Atomic32;
55 #ifdef ARCH_CPU_64_BITS
56 // We need to be able to go between Atomic64 and AtomicWord implicitly. This
57 // means Atomic64 and AtomicWord should be the same type on 64-bit.
58 #if defined(__ILP32__) || defined(OS_NACL)
59 // NaCl's intptr_t is not actually 64-bits on 64-bit!
60 // http://code.google.com/p/nativeclient/issues/detail?id=1162
61 typedef int64_t Atomic64;
62 #else
63 typedef intptr_t Atomic64;
64 #endif
65 #endif
66
67 // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or
68 // Atomic64 routines below, depending on your architecture.
69 typedef intptr_t AtomicWord;
70
71 // Atomically execute:
72 // result = *ptr;
73 // if (*ptr == old_value)
74 // *ptr = new_value;
75 // return result;
76 //
77 // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value".
78 // Always return the old value of "*ptr"
79 //
80 // This routine implies no memory barriers.
81 Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
82 Atomic32 old_value,
83 Atomic32 new_value);
84
85 // Atomically store new_value into *ptr, returning the previous value held in
86 // *ptr. This routine implies no memory barriers.
87 Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, Atomic32 new_value);
88
89 // Atomically increment *ptr by "increment". Returns the new value of
90 // *ptr with the increment applied. This routine implies no memory barriers.
91 Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, Atomic32 increment);
92
93 Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
94 Atomic32 increment);
95
96 // These following lower-level operations are typically useful only to people
97 // implementing higher-level synchronization operations like spinlocks,
98 // mutexes, and condition-variables. They combine CompareAndSwap(), a load, or
99 // a store with appropriate memory-ordering instructions. "Acquire" operations
100 // ensure that no later memory access can be reordered ahead of the operation.
101 // "Release" operations ensure that no previous memory access can be reordered
102 // after the operation. "Barrier" operations have both "Acquire" and "Release"
103 // semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory
104 // access.
105 Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
106 Atomic32 old_value,
107 Atomic32 new_value);
108 Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
109 Atomic32 old_value,
110 Atomic32 new_value);
111
112 void MemoryBarrier();
113 void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value);
114 void Acquire_Store(volatile Atomic32* ptr, Atomic32 value);
115 void Release_Store(volatile Atomic32* ptr, Atomic32 value);
116
117 Atomic32 NoBarrier_Load(volatile const Atomic32* ptr);
118 Atomic32 Acquire_Load(volatile const Atomic32* ptr);
119 Atomic32 Release_Load(volatile const Atomic32* ptr);
120
121 // 64-bit atomic operations (only available on 64-bit processors).
122 #ifdef ARCH_CPU_64_BITS
123 Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
124 Atomic64 old_value,
125 Atomic64 new_value);
126 Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value);
127 Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
128 Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
129
130 Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
131 Atomic64 old_value,
132 Atomic64 new_value);
133 Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
134 Atomic64 old_value,
135 Atomic64 new_value);
136 void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value);
137 void Acquire_Store(volatile Atomic64* ptr, Atomic64 value);
138 void Release_Store(volatile Atomic64* ptr, Atomic64 value);
139 Atomic64 NoBarrier_Load(volatile const Atomic64* ptr);
140 Atomic64 Acquire_Load(volatile const Atomic64* ptr);
141 Atomic64 Release_Load(volatile const Atomic64* ptr);
142 #endif // ARCH_CPU_64_BITS
143
144 } // namespace subtle
145 } // namespace base
146
147 // Try to use a portable implementation based on C++11 atomics.
148 //
149 // Some toolchains support C++11 language features without supporting library
150 // features (recent compiler, older STL). Whitelist libstdc++ and libc++ that we
151 // know will have <atomic> when compiling C++11.
152 #if ((__cplusplus >= 201103L) && \
153 ((defined(__GLIBCXX__) && (__GLIBCXX__ > 20110216)) || \
154 (defined(_LIBCPP_VERSION) && (_LIBCPP_STD_VER >= 11))))
155 # include "base/atomicops_internals_portable.h"
156 #else // Otherwise use a platform specific implementation.
157 # if defined(THREAD_SANITIZER)
158 # error "Thread sanitizer must use the portable atomic operations"
159 # elif (defined(OS_WIN) && defined(COMPILER_MSVC) && \
160 defined(ARCH_CPU_X86_FAMILY))
161 # include "base/atomicops_internals_x86_msvc.h"
162 # elif defined(OS_MACOSX)
163 # include "base/atomicops_internals_mac.h"
164 # else
165 # error "Atomic operations are not supported on your platform"
166 # endif
167 #endif // Portable / non-portable includes.
168
169 // On some platforms we need additional declarations to make
170 // AtomicWord compatible with our other Atomic* types.
171 #if defined(OS_MACOSX) || defined(OS_OPENBSD)
172 #include "base/atomicops_internals_atomicword_compat.h"
173 #endif
174
175 #endif // BASE_ATOMICOPS_H_
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