Add vmov between integers and floats in ARM assembler.

tests_lit/assembler/arm32/vmov-f2i.ll

Index: tests_lit/assembler/arm32/vmov-f2i.ll
diff --git a/tests_lit/assembler/arm32/vmov-f2i.ll b/tests_lit/assembler/arm32/vmov-f2i.ll
new file mode 100644
index 0000000000000000000000000000000000000000..e40bd6613de8905e578a9aebdf0aabcc20f787c4
--- /dev/null
+++ b/tests_lit/assembler/arm32/vmov-f2i.ll
@@ -0,0 +1,125 @@
+; Show that we can move between float (S) and integer (GPR) registers.
+
+; REQUIRES: allow_dump
+
+; Compile using standalone assembler.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
+; RUN:   --reg-use=s20,r5,r6 | FileCheck %s --check-prefix=ASM
+
+; Show bytes in assembled standalone code.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -Om1 --reg-use=s20,r5,r6  | FileCheck %s --check-prefix=DIS
+
+; Compile using integrated assembler.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
+; RUN:   --reg-use=s20,r5,r6 \
+; RUN:   | FileCheck %s --check-prefix=IASM
+
+; Show bytes in assembled integrated code.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -Om1 --reg-use=s20,r5,r6 | FileCheck %s --check-prefix=DIS
+
+define internal void @FloatToSignedI1() {
+; ASM-LABEL: FloatToSignedI1:
+; DIS-LABEL: {{.*}} <FloatToSignedI1>:

[Jim Stichnoth, 2016/01/27 22:59:22]

Putting {{.*}} at the beginning or end of the match string is redundant.  Either
omit it entirely, or use {{.+}}.

[Karl, 2016/01/27 23:36:42]

Done.

+
+  %v = fptosi float 0.0 to i1
+
+; ASM:  vmov    r5, s20
+; DIS:   {{.*}}:   ee1a5a10
+; IASM-NOT: vmov
+
+  ret void
+}
+
+define internal void @FloatToSignedI8() {
+; ASM-LABEL: FloatToSignedI8:
+; DIS-LABEL: {{.*}} <FloatToSignedI8>:
+
+  %v = fptosi float 0.0 to i8
+
+; ASM:  vmov    r5, s20
+; DIS:   {{.*}}:   ee1a5a10
+; IASM-NOT: vmov
+
+  ret void
+}
+

[Jim Stichnoth, 2016/01/27 22:59:22]

two newlines

[Karl, 2016/01/27 23:36:42]

Done.

+
+define internal void @FloatToSignedI16() {
+; ASM-LABEL: FloatToSignedI16:
+; DIS-LABEL: {{.*}} <FloatToSignedI16>:
+
+  %v = fptosi float 0.0 to i16
+
+; ASM:  vmov    r5, s20
+; DIS:   {{.*}}:   ee1a5a10
+; IASM-NOT: vmov
+
+  ret void
+}
+
+define internal void @FloatToSignedI32() {
+; ASM-LABEL: FloatToSignedI32:
+; DIS-LABEL: {{.*}} <FloatToSignedI32>:
+
+  %v = fptosi float 0.0 to i32
+
+; ASM:  vmov    r5, s20
+; DIS:   {{.*}}:   ee1a5a10
+; IASM-NOT: vmov
+
+  ret void
+}
+
+define internal float @SignedI1ToFloat() {
+; ASM-LABEL: SignedI1ToFloat:
+; DIS-LABEL: {{.*}} <SignedI1ToFloat>:
+
+  %v = sitofp i1 1 to float

[Jim Stichnoth, 2016/01/27 22:59:22]

I would use uitofp for these tests, particularly because a "signed" i1 is either
0 or -1, and it would be just weird to put the "correct" value of -1 here.

[Karl, 2016/01/27 23:36:42]

Done.

+
+; ASM:  vmov    s20, r5
+; DIS:  {{.*}}:   ee0a5a10
+; IASM-NOT: vmov
+
+  ret float %v
+}
+
+define internal float @SignedI8ToFloat() {
+; ASM-LABEL: SignedI8ToFloat:
+; DIS-LABEL: {{.*}} <SignedI8ToFloat>:
+
+  %v = sitofp i8 1 to float
+
+; ASM:  vmov    s20, r5
+; DIS:  {{.*}}:   ee0a5a10
+; IASM-NOT: vmov
+
+  ret float %v
+}
+
+define internal float @SignedI16ToFloat() {
+; ASM-LABEL: SignedI16ToFloat:
+; DIS-LABEL: {{.*}} <SignedI16ToFloat>:
+
+  %v = sitofp i16 1 to float
+
+; ASM:  vmov    s20, r5
+; DIS:  {{.*}}:   ee0a5a10
+; IASM-NOT: vmov
+
+  ret float %v
+}
+
+define internal float @SignedI32ToFloat() {
+; ASM-LABEL: SignedI32ToFloat:
+; DIS-LABEL: {{.*}} <SignedI32ToFloat>:
+
+  %v = sitofp i32 17 to float
+
+; ASM:  vmov    s20, r5
+; DIS:  {{.*}}:   ee0a5a10
+; IASM-NOT: vmov
+
+  ret float %v
+}