OLD | NEW |
1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// |
2 // | 2 // |
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
6 // | 6 // |
7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
8 // | 8 // |
9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
10 // | 10 // |
(...skipping 411 matching lines...) Loading... |
422 | 422 |
423 void vmuls(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm, | 423 void vmuls(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm, |
424 CondARM32::Cond Cond); | 424 CondARM32::Cond Cond); |
425 | 425 |
426 void vpop(const Variable *OpBaseReg, SizeT NumConsecRegs, | 426 void vpop(const Variable *OpBaseReg, SizeT NumConsecRegs, |
427 CondARM32::Cond Cond); | 427 CondARM32::Cond Cond); |
428 | 428 |
429 void vpush(const Variable *OpBaseReg, SizeT NumConsecRegs, | 429 void vpush(const Variable *OpBaseReg, SizeT NumConsecRegs, |
430 CondARM32::Cond Cond); | 430 CondARM32::Cond Cond); |
431 | 431 |
| 432 void vsqrtd(const Operand *OpDd, const Operand *OpDm, CondARM32::Cond Cond); |
| 433 |
| 434 void vsqrts(const Operand *OpSd, const Operand *OpSm, CondARM32::Cond Cond); |
| 435 |
432 void vstrd(const Operand *OpDd, const Operand *OpAddress, | 436 void vstrd(const Operand *OpDd, const Operand *OpAddress, |
433 CondARM32::Cond Cond, const TargetInfo &TInfo); | 437 CondARM32::Cond Cond, const TargetInfo &TInfo); |
434 | 438 |
435 void vstrd(const Operand *OpDd, const Operand *OpAddress, | 439 void vstrd(const Operand *OpDd, const Operand *OpAddress, |
436 CondARM32::Cond Cond, const TargetLowering *Lowering) { | 440 CondARM32::Cond Cond, const TargetLowering *Lowering) { |
437 const TargetInfo TInfo(Lowering); | 441 const TargetInfo TInfo(Lowering); |
438 vstrd(OpDd, OpAddress, Cond, TInfo); | 442 vstrd(OpDd, OpAddress, Cond, TInfo); |
439 } | 443 } |
440 | 444 |
441 void vstrs(const Operand *OpSd, const Operand *OpAddress, | 445 void vstrs(const Operand *OpSd, const Operand *OpAddress, |
(...skipping 180 matching lines...) Loading... |
622 | 626 |
623 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpSd, | 627 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpSd, |
624 const Operand *OpSn, const Operand *OpSm, | 628 const Operand *OpSn, const Operand *OpSm, |
625 const char *InstName); | 629 const char *InstName); |
626 }; | 630 }; |
627 | 631 |
628 } // end of namespace ARM32 | 632 } // end of namespace ARM32 |
629 } // end of namespace Ice | 633 } // end of namespace Ice |
630 | 634 |
631 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H | 635 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H |
OLD | NEW |