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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 196 WriteBarrierMode write_barrier_mode, | 196 WriteBarrierMode write_barrier_mode, |
| 197 ICacheFlushMode icache_flush_mode) { | 197 ICacheFlushMode icache_flush_mode) { |
| 198 DCHECK(cell->IsCell()); | 198 DCHECK(cell->IsCell()); |
| 199 DCHECK(rmode_ == RelocInfo::CELL); | 199 DCHECK(rmode_ == RelocInfo::CELL); |
| 200 Address address = cell->address() + Cell::kValueOffset; | 200 Address address = cell->address() + Cell::kValueOffset; |
| 201 Memory::Address_at(pc_) = address; | 201 Memory::Address_at(pc_) = address; |
| 202 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 202 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
| 203 Assembler::FlushICache(isolate_, pc_, sizeof(Address)); | 203 Assembler::FlushICache(isolate_, pc_, sizeof(Address)); |
| 204 } | 204 } |
| 205 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) { | 205 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) { |
| 206 // TODO(1550) We are passing NULL as a slot because cell can never be on | 206 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(host(), this, |
| 207 // evacuation candidate. | 207 cell); |
| 208 host()->GetHeap()->incremental_marking()->RecordWrite( | |
| 209 host(), NULL, cell); | |
| 210 } | 208 } |
| 211 } | 209 } |
| 212 | 210 |
| 213 | 211 |
| 214 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { | 212 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { |
| 215 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 213 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 216 DCHECK(*pc_ == kCallOpcode); | 214 DCHECK(*pc_ == kCallOpcode); |
| 217 return Memory::Object_Handle_at(pc_ + 1); | 215 return Memory::Object_Handle_at(pc_ + 1); |
| 218 } | 216 } |
| 219 | 217 |
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| 558 | 556 |
| 559 Operand::Operand(Immediate imm) { | 557 Operand::Operand(Immediate imm) { |
| 560 // [disp/r] | 558 // [disp/r] |
| 561 set_modrm(0, ebp); | 559 set_modrm(0, ebp); |
| 562 set_dispr(imm.x_, imm.rmode_); | 560 set_dispr(imm.x_, imm.rmode_); |
| 563 } | 561 } |
| 564 } // namespace internal | 562 } // namespace internal |
| 565 } // namespace v8 | 563 } // namespace v8 |
| 566 | 564 |
| 567 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ | 565 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ |
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