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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 48 | 48 |
| 49 // Get the CPU features enabled by the build. | 49 // Get the CPU features enabled by the build. |
| 50 static unsigned CpuFeaturesImpliedByCompiler() { | 50 static unsigned CpuFeaturesImpliedByCompiler() { |
| 51 unsigned answer = 0; | 51 unsigned answer = 0; |
| 52 return answer; | 52 return answer; |
| 53 } | 53 } |
| 54 | 54 |
| 55 | 55 |
| 56 void CpuFeatures::ProbeImpl(bool cross_compile) { | 56 void CpuFeatures::ProbeImpl(bool cross_compile) { |
| 57 supported_ |= CpuFeaturesImpliedByCompiler(); | 57 supported_ |= CpuFeaturesImpliedByCompiler(); |
| 58 cache_line_size_ = 128; | 58 icache_line_size_ = 128; |
| 59 | 59 |
| 60 // Only use statically determined features for cross compile (snapshot). | 60 // Only use statically determined features for cross compile (snapshot). |
| 61 if (cross_compile) return; | 61 if (cross_compile) return; |
| 62 | 62 |
| 63 // Detect whether frim instruction is supported (POWER5+) | 63 // Detect whether frim instruction is supported (POWER5+) |
| 64 // For now we will just check for processors we know do not | 64 // For now we will just check for processors we know do not |
| 65 // support it | 65 // support it |
| 66 #ifndef USE_SIMULATOR | 66 #ifndef USE_SIMULATOR |
| 67 // Probe for additional features at runtime. | 67 // Probe for additional features at runtime. |
| 68 base::CPU cpu; | 68 base::CPU cpu; |
| 69 #if V8_TARGET_ARCH_PPC64 | 69 #if V8_TARGET_ARCH_PPC64 |
| 70 if (cpu.part() == base::CPU::PPC_POWER8) { | 70 if (cpu.part() == base::CPU::PPC_POWER8) { |
| 71 supported_ |= (1u << FPR_GPR_MOV); | 71 supported_ |= (1u << FPR_GPR_MOV); |
| 72 } | 72 } |
| 73 #endif | 73 #endif |
| 74 if (cpu.part() == base::CPU::PPC_POWER6 || | 74 if (cpu.part() == base::CPU::PPC_POWER6 || |
| 75 cpu.part() == base::CPU::PPC_POWER7 || | 75 cpu.part() == base::CPU::PPC_POWER7 || |
| 76 cpu.part() == base::CPU::PPC_POWER8) { | 76 cpu.part() == base::CPU::PPC_POWER8) { |
| 77 supported_ |= (1u << LWSYNC); | 77 supported_ |= (1u << LWSYNC); |
| 78 } | 78 } |
| 79 if (cpu.part() == base::CPU::PPC_POWER7 || | 79 if (cpu.part() == base::CPU::PPC_POWER7 || |
| 80 cpu.part() == base::CPU::PPC_POWER8) { | 80 cpu.part() == base::CPU::PPC_POWER8) { |
| 81 supported_ |= (1u << ISELECT); | 81 supported_ |= (1u << ISELECT); |
| 82 } | 82 } |
| 83 #if V8_OS_LINUX | 83 #if V8_OS_LINUX |
| 84 if (!(cpu.part() == base::CPU::PPC_G5 || cpu.part() == base::CPU::PPC_G4)) { | 84 if (!(cpu.part() == base::CPU::PPC_G5 || cpu.part() == base::CPU::PPC_G4)) { |
| 85 // Assume support | 85 // Assume support |
| 86 supported_ |= (1u << FPU); | 86 supported_ |= (1u << FPU); |
| 87 } | 87 } |
| 88 if (cpu.icache_line_size() != base::CPU::UNKNOWN_CACHE_LINE_SIZE) { |
| 89 icache_line_size_ = cpu.icache_line_size(); |
| 90 } |
| 88 #elif V8_OS_AIX | 91 #elif V8_OS_AIX |
| 89 // Assume support FP support and default cache line size | 92 // Assume support FP support and default cache line size |
| 90 supported_ |= (1u << FPU); | 93 supported_ |= (1u << FPU); |
| 91 #endif | 94 #endif |
| 92 #else // Simulator | 95 #else // Simulator |
| 93 supported_ |= (1u << FPU); | 96 supported_ |= (1u << FPU); |
| 94 supported_ |= (1u << LWSYNC); | 97 supported_ |= (1u << LWSYNC); |
| 95 supported_ |= (1u << ISELECT); | 98 supported_ |= (1u << ISELECT); |
| 96 #if V8_TARGET_ARCH_PPC64 | 99 #if V8_TARGET_ARCH_PPC64 |
| 97 supported_ |= (1u << FPR_GPR_MOV); | 100 supported_ |= (1u << FPR_GPR_MOV); |
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| 2474 | 2477 |
| 2475 trampoline_ = Trampoline(pc_offset() - size, tracked_branch_count_); | 2478 trampoline_ = Trampoline(pc_offset() - size, tracked_branch_count_); |
| 2476 } | 2479 } |
| 2477 } | 2480 } |
| 2478 | 2481 |
| 2479 | 2482 |
| 2480 } // namespace internal | 2483 } // namespace internal |
| 2481 } // namespace v8 | 2484 } // namespace v8 |
| 2482 | 2485 |
| 2483 #endif // V8_TARGET_ARCH_PPC | 2486 #endif // V8_TARGET_ARCH_PPC |
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