Add the VMLS instruction to the integrated ARM assembler.

src/IceInstARM32.cpp

Index: src/IceInstARM32.cpp
diff --git a/src/IceInstARM32.cpp b/src/IceInstARM32.cpp
index 78e4e9a04e715e8e5d517a1783d1e52c6d7d8913..64a535c5db2adb41a4447babc8c6a8e8afdbd940 100644
--- a/src/IceInstARM32.cpp
+++ b/src/IceInstARM32.cpp
@@ -666,15 +666,36 @@ template <> void InstARM32Vmla::emitIAS(const Cfg *Func) const {
   default:
     // TODO(kschimpf) Figure out how vector operations apply.
     emitUsingTextFixup(Func);
-    break;
+    return;
   case IceType_f32:
     Asm->vmlas(getDest(), getSrc(1), getSrc(2), CondARM32::AL);
     assert(!Asm->needsTextFixup());
-    break;
+    return;
   case IceType_f64:
     Asm->vmlad(getDest(), getSrc(1), getSrc(2), CondARM32::AL);
     assert(!Asm->needsTextFixup());
-    break;
+    return;
+  }
+}
+
+template <> void InstARM32Vmls::emitIAS(const Cfg *Func) const {
+  // Note: Dest == getSrc(0) for four address FP instructions.
+  assert(getSrcSize() == 3);
+  auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  const Variable *Dest = getDest();
+  switch (Dest->getType()) {
+  default:
+    // TODO(kschimpf) Figure out how vector operations apply.
+    emitUsingTextFixup(Func);
+    return;
+  case IceType_f32:
+    Asm->vmlss(getDest(), getSrc(1), getSrc(2), CondARM32::AL);
+    assert(!Asm->needsTextFixup());
+    return;
+  case IceType_f64:
+    Asm->vmlsd(getDest(), getSrc(1), getSrc(2), CondARM32::AL);
+    assert(!Asm->needsTextFixup());
+    return;
   }
 }