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| 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// | 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 659 | 659 |
| 660 template <> void InstARM32Vmla::emitIAS(const Cfg *Func) const { | 660 template <> void InstARM32Vmla::emitIAS(const Cfg *Func) const { |
| 661 // Note: Dest == getSrc(0) for four address FP instructions. | 661 // Note: Dest == getSrc(0) for four address FP instructions. |
| 662 assert(getSrcSize() == 3); | 662 assert(getSrcSize() == 3); |
| 663 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); | 663 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 664 const Variable *Dest = getDest(); | 664 const Variable *Dest = getDest(); |
| 665 switch (Dest->getType()) { | 665 switch (Dest->getType()) { |
| 666 default: | 666 default: |
| 667 // TODO(kschimpf) Figure out how vector operations apply. | 667 // TODO(kschimpf) Figure out how vector operations apply. |
| 668 emitUsingTextFixup(Func); | 668 emitUsingTextFixup(Func); |
| 669 break; | 669 return; |
| 670 case IceType_f32: | 670 case IceType_f32: |
| 671 Asm->vmlas(getDest(), getSrc(1), getSrc(2), CondARM32::AL); | 671 Asm->vmlas(getDest(), getSrc(1), getSrc(2), CondARM32::AL); |
| 672 assert(!Asm->needsTextFixup()); | 672 assert(!Asm->needsTextFixup()); |
| 673 break; | 673 return; |
| 674 case IceType_f64: | 674 case IceType_f64: |
| 675 Asm->vmlad(getDest(), getSrc(1), getSrc(2), CondARM32::AL); | 675 Asm->vmlad(getDest(), getSrc(1), getSrc(2), CondARM32::AL); |
| 676 assert(!Asm->needsTextFixup()); | 676 assert(!Asm->needsTextFixup()); |
| 677 break; | 677 return; |
| 678 } | 678 } |
| 679 } | 679 } |
| 680 | 680 |
| 681 template <> void InstARM32Vmls::emitIAS(const Cfg *Func) const { |
| 682 // Note: Dest == getSrc(0) for four address FP instructions. |
| 683 assert(getSrcSize() == 3); |
| 684 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 685 const Variable *Dest = getDest(); |
| 686 switch (Dest->getType()) { |
| 687 default: |
| 688 // TODO(kschimpf) Figure out how vector operations apply. |
| 689 emitUsingTextFixup(Func); |
| 690 return; |
| 691 case IceType_f32: |
| 692 Asm->vmlss(getDest(), getSrc(1), getSrc(2), CondARM32::AL); |
| 693 assert(!Asm->needsTextFixup()); |
| 694 return; |
| 695 case IceType_f64: |
| 696 Asm->vmlsd(getDest(), getSrc(1), getSrc(2), CondARM32::AL); |
| 697 assert(!Asm->needsTextFixup()); |
| 698 return; |
| 699 } |
| 700 } |
| 701 |
| 681 template <> void InstARM32Vorr::emitIAS(const Cfg *Func) const { | 702 template <> void InstARM32Vorr::emitIAS(const Cfg *Func) const { |
| 682 // TODO(kschimpf): add support for these instructions | 703 // TODO(kschimpf): add support for these instructions |
| 683 emitUsingTextFixup(Func); | 704 emitUsingTextFixup(Func); |
| 684 } | 705 } |
| 685 | 706 |
| 686 template <> void InstARM32Vsub::emitIAS(const Cfg *Func) const { | 707 template <> void InstARM32Vsub::emitIAS(const Cfg *Func) const { |
| 687 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); | 708 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 688 const Variable *Dest = getDest(); | 709 const Variable *Dest = getDest(); |
| 689 switch (Dest->getType()) { | 710 switch (Dest->getType()) { |
| 690 default: | 711 default: |
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| 2401 | 2422 |
| 2402 template class InstARM32FourAddrGPR<InstARM32::Mla>; | 2423 template class InstARM32FourAddrGPR<InstARM32::Mla>; |
| 2403 template class InstARM32FourAddrGPR<InstARM32::Mls>; | 2424 template class InstARM32FourAddrGPR<InstARM32::Mls>; |
| 2404 | 2425 |
| 2405 template class InstARM32CmpLike<InstARM32::Cmn>; | 2426 template class InstARM32CmpLike<InstARM32::Cmn>; |
| 2406 template class InstARM32CmpLike<InstARM32::Cmp>; | 2427 template class InstARM32CmpLike<InstARM32::Cmp>; |
| 2407 template class InstARM32CmpLike<InstARM32::Tst>; | 2428 template class InstARM32CmpLike<InstARM32::Tst>; |
| 2408 | 2429 |
| 2409 } // end of namespace ARM32 | 2430 } // end of namespace ARM32 |
| 2410 } // end of namespace Ice | 2431 } // end of namespace Ice |
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