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Unified Diff: src/IceTargetLoweringARM32.h

Issue 1641653004: Subzero: Make the register allocator more robust with -reg-use and -reg-exclude. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Test code accidentally left in Created 4 years, 11 months ago
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Index: src/IceTargetLoweringARM32.h
diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h
index b8c10406e15457bc42827089125d6b70305cc90a..af55141c9ca34ff6be36b379707fcc59f83bf929 100644
--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -88,6 +88,12 @@ public:
assert(RC < RC_Target);
return TypeToRegisterSet[RC];
}
+ const llvm::SmallBitVector &
+ getAllRegistersForVariable(const Variable *Var) const override {
+ RegClass RC = Var->getRegClass();
+ assert(RC < RC_Target);
+ return TypeToRegisterSetUnfiltered[RC];
+ }
const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override {
return RegisterAliases[Reg];
}
@@ -1020,6 +1026,8 @@ protected:
uint32_t MaxOutArgsSizeBytes = 0;
// TODO(jpp): std::array instead of array.
static llvm::SmallBitVector TypeToRegisterSet[RegARM32::RCARM32_NUM];
+ static llvm::SmallBitVector
+ TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
static llvm::SmallBitVector RegisterAliases[RegARM32::Reg_NUM];
llvm::SmallBitVector RegsUsed;
VarList PhysicalRegisters[IceType_NUM];
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