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1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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117 } | 117 } |
118 llvm::SmallBitVector getRegisterSet(RegSetMask Include, | 118 llvm::SmallBitVector getRegisterSet(RegSetMask Include, |
119 RegSetMask Exclude) const override; | 119 RegSetMask Exclude) const override; |
120 const llvm::SmallBitVector & | 120 const llvm::SmallBitVector & |
121 getRegistersForVariable(const Variable *Var) const override { | 121 getRegistersForVariable(const Variable *Var) const override { |
122 RegClass RC = Var->getRegClass(); | 122 RegClass RC = Var->getRegClass(); |
123 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); | 123 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); |
124 return TypeToRegisterSet[RC]; | 124 return TypeToRegisterSet[RC]; |
125 } | 125 } |
126 | 126 |
| 127 const llvm::SmallBitVector & |
| 128 getAllRegistersForVariable(const Variable *Var) const override { |
| 129 RegClass RC = Var->getRegClass(); |
| 130 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); |
| 131 return TypeToRegisterSetUnfiltered[RC]; |
| 132 } |
| 133 |
127 const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override { | 134 const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override { |
128 assert(Reg < Traits::RegisterSet::Reg_NUM); | 135 assert(Reg < Traits::RegisterSet::Reg_NUM); |
129 return RegisterAliases[Reg]; | 136 return RegisterAliases[Reg]; |
130 } | 137 } |
131 | 138 |
132 bool hasFramePointer() const override { return IsEbpBasedFrame; } | 139 bool hasFramePointer() const override { return IsEbpBasedFrame; } |
133 void setHasFramePointer() override { IsEbpBasedFrame = true; } | 140 void setHasFramePointer() override { IsEbpBasedFrame = true; } |
134 SizeT getStackReg() const override { return Traits::StackPtr; } | 141 SizeT getStackReg() const override { return Traits::StackPtr; } |
135 SizeT getFrameReg() const override { return Traits::FramePtr; } | 142 SizeT getFrameReg() const override { return Traits::FramePtr; } |
136 SizeT getFrameOrStackReg() const override { | 143 SizeT getFrameOrStackReg() const override { |
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967 | 974 |
968 InstructionSetEnum InstructionSet = Traits::InstructionSet::Begin; | 975 InstructionSetEnum InstructionSet = Traits::InstructionSet::Begin; |
969 bool IsEbpBasedFrame = false; | 976 bool IsEbpBasedFrame = false; |
970 bool NeedsStackAlignment = false; | 977 bool NeedsStackAlignment = false; |
971 size_t SpillAreaSizeBytes = 0; | 978 size_t SpillAreaSizeBytes = 0; |
972 size_t FixedAllocaSizeBytes = 0; | 979 size_t FixedAllocaSizeBytes = 0; |
973 size_t FixedAllocaAlignBytes = 0; | 980 size_t FixedAllocaAlignBytes = 0; |
974 bool PrologEmitsFixedAllocas = false; | 981 bool PrologEmitsFixedAllocas = false; |
975 uint32_t MaxOutArgsSizeBytes = 0; | 982 uint32_t MaxOutArgsSizeBytes = 0; |
976 static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet; | 983 static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet; |
| 984 static std::array<llvm::SmallBitVector, RCX86_NUM> |
| 985 TypeToRegisterSetUnfiltered; |
977 static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> | 986 static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> |
978 RegisterAliases; | 987 RegisterAliases; |
979 llvm::SmallBitVector RegsUsed; | 988 llvm::SmallBitVector RegsUsed; |
980 std::array<VarList, IceType_NUM> PhysicalRegisters; | 989 std::array<VarList, IceType_NUM> PhysicalRegisters; |
981 // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the | 990 // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the |
982 // current sandboxing type. | 991 // current sandboxing type. |
983 Variable *RebasePtr = nullptr; | 992 Variable *RebasePtr = nullptr; |
984 | 993 |
985 /// Randomize a given immediate operand | 994 /// Randomize a given immediate operand |
986 Operand *randomizeOrPoolImmediate(Constant *Immediate, | 995 Operand *randomizeOrPoolImmediate(Constant *Immediate, |
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1110 | 1119 |
1111 explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {} | 1120 explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {} |
1112 }; | 1121 }; |
1113 | 1122 |
1114 } // end of namespace X86NAMESPACE | 1123 } // end of namespace X86NAMESPACE |
1115 } // end of namespace Ice | 1124 } // end of namespace Ice |
1116 | 1125 |
1117 #include "IceTargetLoweringX86BaseImpl.h" | 1126 #include "IceTargetLoweringX86BaseImpl.h" |
1118 | 1127 |
1119 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H | 1128 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H |
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