| OLD | NEW |
| 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // | 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 100 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 111 /// Base class for Mips instructions. | 111 /// Base class for Mips instructions. |
| 112 class InstMIPS32 : public InstTarget { | 112 class InstMIPS32 : public InstTarget { |
| 113 InstMIPS32() = delete; | 113 InstMIPS32() = delete; |
| 114 InstMIPS32(const InstMIPS32 &) = delete; | 114 InstMIPS32(const InstMIPS32 &) = delete; |
| 115 InstMIPS32 &operator=(const InstMIPS32 &) = delete; | 115 InstMIPS32 &operator=(const InstMIPS32 &) = delete; |
| 116 | 116 |
| 117 public: | 117 public: |
| 118 enum InstKindMIPS32 { | 118 enum InstKindMIPS32 { |
| 119 k__Start = Inst::Target, | 119 k__Start = Inst::Target, |
| 120 Add, | 120 Add, |
| 121 Addu, |
| 121 And, | 122 And, |
| 122 Addiu, | 123 Addiu, |
| 124 Call, |
| 123 La, | 125 La, |
| 124 Lui, | 126 Lui, |
| 125 Mov, // actually a pseudo op for addi rd, rs, 0 | 127 Mov, // actually a pseudo op for addi rd, rs, 0 |
| 126 Mul, | 128 Mul, |
| 127 Or, | 129 Or, |
| 128 Ori, | 130 Ori, |
| 129 Ret, | 131 Ret, |
| 130 Sub, | 132 Sub, |
| 133 Subu, |
| 134 Sltu, |
| 131 Xor | 135 Xor |
| 132 }; | 136 }; |
| 133 | 137 |
| 134 static const char *getWidthString(Type Ty); | 138 static const char *getWidthString(Type Ty); |
| 135 | 139 |
| 136 void dump(const Cfg *Func) const override; | 140 void dump(const Cfg *Func) const override; |
| 137 | 141 |
| 138 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { | 142 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { |
| 139 Str << Opcode << "." << Ty; | 143 Str << Opcode << "." << Ty; |
| 140 } | 144 } |
| 141 | 145 |
| 146 // TODO(rkotler): while branching is not implemented |
| 147 bool repointEdges(CfgNode *, CfgNode *) override { return true; } |
| 148 |
| 142 /// Shared emit routines for common forms of instructions. | 149 /// Shared emit routines for common forms of instructions. |
| 143 static void emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst, | 150 static void emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst, |
| 144 const Cfg *Func); | 151 const Cfg *Func); |
| 145 static void emitThreeAddr(const char *Opcode, const InstMIPS32 *Inst, | 152 static void emitThreeAddr(const char *Opcode, const InstMIPS32 *Inst, |
| 146 const Cfg *Func); | 153 const Cfg *Func); |
| 147 | 154 |
| 148 protected: | 155 protected: |
| 149 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest) | 156 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest) |
| 150 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} | 157 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} |
| 151 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) { | 158 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) { |
| (...skipping 114 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 266 InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, | 273 InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, |
| 267 Variable *Src1) | 274 Variable *Src1) |
| 268 : InstMIPS32(Func, K, 2, Dest) { | 275 : InstMIPS32(Func, K, 2, Dest) { |
| 269 addSource(Src0); | 276 addSource(Src0); |
| 270 addSource(Src1); | 277 addSource(Src1); |
| 271 } | 278 } |
| 272 | 279 |
| 273 static const char *Opcode; | 280 static const char *Opcode; |
| 274 }; | 281 }; |
| 275 | 282 |
| 283 class InstMIPS32Call : public InstMIPS32 { |
| 284 InstMIPS32Call() = delete; |
| 285 InstMIPS32Call(const InstMIPS32Call &) = delete; |
| 286 InstMIPS32Call &operator=(const InstMIPS32Call &) = delete; |
| 287 |
| 288 public: |
| 289 static InstMIPS32Call *create(Cfg *Func, Variable *Dest, |
| 290 Operand *CallTarget) { |
| 291 return new (Func->allocate<InstMIPS32Call>()) |
| 292 InstMIPS32Call(Func, Dest, CallTarget); |
| 293 } |
| 294 Operand *getCallTarget() const { return getSrc(0); } |
| 295 void emit(const Cfg *Func) const override; |
| 296 void emitIAS(const Cfg *Func) const override; |
| 297 void dump(const Cfg *Func) const override; |
| 298 static bool classof(const Inst *Inst) { return isClassof(Inst, Call); } |
| 299 |
| 300 private: |
| 301 InstMIPS32Call(Cfg *Func, Variable *Dest, Operand *CallTarget); |
| 302 }; |
| 303 |
| 276 template <InstMIPS32::InstKindMIPS32 K, bool Signed = false> | 304 template <InstMIPS32::InstKindMIPS32 K, bool Signed = false> |
| 277 class InstMIPS32Imm16 : public InstMIPS32 { | 305 class InstMIPS32Imm16 : public InstMIPS32 { |
| 278 InstMIPS32Imm16() = delete; | 306 InstMIPS32Imm16() = delete; |
| 279 InstMIPS32Imm16(const InstMIPS32Imm16 &) = delete; | 307 InstMIPS32Imm16(const InstMIPS32Imm16 &) = delete; |
| 280 InstMIPS32Imm16 &operator=(const InstMIPS32Imm16 &) = delete; | 308 InstMIPS32Imm16 &operator=(const InstMIPS32Imm16 &) = delete; |
| 281 | 309 |
| 282 public: | 310 public: |
| 283 static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, Operand *Source, | 311 static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, Operand *Source, |
| 284 uint32_t Imm) { | 312 uint32_t Imm) { |
| 285 return new (Func->allocate<InstMIPS32Imm16>()) | 313 return new (Func->allocate<InstMIPS32Imm16>()) |
| (...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 339 | 367 |
| 340 InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm) | 368 InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm) |
| 341 : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {} | 369 : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {} |
| 342 | 370 |
| 343 static const char *Opcode; | 371 static const char *Opcode; |
| 344 | 372 |
| 345 const uint32_t Imm; | 373 const uint32_t Imm; |
| 346 }; | 374 }; |
| 347 | 375 |
| 348 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; | 376 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; |
| 377 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; |
| 349 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; | 378 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; |
| 350 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; | 379 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; |
| 351 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; | 380 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; |
| 352 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; | 381 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; |
| 353 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; | 382 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; |
| 354 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; | 383 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; |
| 355 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 384 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
| 385 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; |
| 356 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; | 386 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; |
| 387 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; |
| 357 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 388 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
| 358 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; | 389 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; |
| 359 | 390 |
| 360 /// Handles (some of) vmov's various formats. | 391 /// Handles (some of) vmov's various formats. |
| 361 class InstMIPS32Mov final : public InstMIPS32 { | 392 class InstMIPS32Mov final : public InstMIPS32 { |
| 362 InstMIPS32Mov() = delete; | 393 InstMIPS32Mov() = delete; |
| 363 InstMIPS32Mov(const InstMIPS32Mov &) = delete; | 394 InstMIPS32Mov(const InstMIPS32Mov &) = delete; |
| 364 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete; | 395 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete; |
| 365 | 396 |
| 366 public: | 397 public: |
| (...skipping 26 matching lines...) Expand all Loading... |
| 393 void emitSingleDestMultiSource(const Cfg *Func) const; | 424 void emitSingleDestMultiSource(const Cfg *Func) const; |
| 394 void emitSingleDestSingleSource(const Cfg *Func) const; | 425 void emitSingleDestSingleSource(const Cfg *Func) const; |
| 395 | 426 |
| 396 Variable *DestHi = nullptr; | 427 Variable *DestHi = nullptr; |
| 397 }; | 428 }; |
| 398 | 429 |
| 399 } // end of namespace MIPS32 | 430 } // end of namespace MIPS32 |
| 400 } // end of namespace Ice | 431 } // end of namespace Ice |
| 401 | 432 |
| 402 #endif // SUBZERO_SRC_ICEINSTMIPS32_H | 433 #endif // SUBZERO_SRC_ICEINSTMIPS32_H |
| OLD | NEW |