Subzero: Mips: Lower some i64 arithmetic instructions

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 119 matching lines @@
     llvm::report_fatal_error("Not yet implemented");
   }
 
   // The following are helpers that insert lowered MIPS32 instructions with
   // minimal syntactic overhead, so that the lowering code can look as close to
   // assembly as practical.
   void _add(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Add>(Dest, Src0, Src1);
   }
 
+  void _addu(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert<InstMIPS32Addu>(Dest, Src0, Src1);
+  }
+
   void _and(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32And>(Dest, Src0, Src1);
   }
 
   void _ret(Variable *RA, Variable *Src0 = nullptr) {
     Context.insert<InstMIPS32Ret>(RA, Src0);
   }
 
   void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Addiu>(Dest, Src, Imm);
@@ skipping 28 matching lines @@
   }
 
   void _ori(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert<InstMIPS32Ori>(Dest, Src, Imm);
   }
 
   void _sub(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Sub>(Dest, Src0, Src1);
   }
 
+  void _sltu(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert<InstMIPS32Sltu>(Dest, Src0, Src1);
+  }
+
+  void _subu(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert<InstMIPS32Subu>(Dest, Src0, Src1);
+  }
+
   void _xor(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Xor>(Dest, Src0, Src1);
   }
 
   void lowerArguments() override;
 
   /// Operand legalization helpers.  To deal with address mode constraints,
   /// the helpers will create a new Operand and emit instructions that
   /// guarantee that the Operand kind is one of those indicated by the
   /// LegalMask (a bitmask of allowed kinds).  If the input Operand is known
@@ skipping 30 matching lines @@
 
   Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister);
 
 protected:
   explicit TargetMIPS32(Cfg *Func);
 
   void postLower() override;
 
   void lowerAlloca(const InstAlloca *Inst) override;
   void lowerArithmetic(const InstArithmetic *Inst) override;
+  void lowerInt64Arithmetic(const InstArithmetic *Inst, Variable *Dest,
+                            Operand *Src0, Operand *Src1);
   void lowerAssign(const InstAssign *Inst) override;
   void lowerBr(const InstBr *Inst) override;
   void lowerCall(const InstCall *Inst) override;
   void lowerCast(const InstCast *Inst) override;
   void lowerExtractElement(const InstExtractElement *Inst) override;
   void lowerFcmp(const InstFcmp *Inst) override;
   void lowerIcmp(const InstIcmp *Inst) override;
   void lowerIntrinsicCall(const InstIntrinsicCall *Inst) override;
   void lowerInsertElement(const InstInsertElement *Inst) override;
   void lowerLoad(const InstLoad *Inst) override;
@@ skipping 69 matching lines @@
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H