| Index: src/IceTargetLoweringARM32.cpp
|
| diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
|
| index f836fe5d5895bac5698a9e6be013ed7c052e5274..4b2dc98ef735465fb561cf2502a69a98df20d84d 100644
|
| --- a/src/IceTargetLoweringARM32.cpp
|
| +++ b/src/IceTargetLoweringARM32.cpp
|
| @@ -2808,6 +2808,7 @@ void TargetARM32::lowerArithmetic(const InstArithmetic *Instr) {
|
| case InstArithmetic::Fsub:
|
| case InstArithmetic::Sub:
|
| case InstArithmetic::And:
|
| + case InstArithmetic::Or:
|
| break;
|
| }
|
| }
|
| @@ -2968,8 +2969,13 @@ void TargetARM32::lowerArithmetic(const InstArithmetic *Instr) {
|
| }
|
| case InstArithmetic::Or: {
|
| Variable *Src0R = Srcs.src0R(this);
|
| - Operand *Src1RF = Srcs.src1RF(this);
|
| - _orr(T, Src0R, Src1RF);
|
| + if (isVectorType(DestTy)) {
|
| + Variable *Src1R = legalizeToReg(Src1);
|
| + _vorr(T, Src0R, Src1R);
|
| + } else {
|
| + Operand *Src1RF = Srcs.src1RF(this);
|
| + _orr(T, Src0R, Src1RF);
|
| + }
|
| _mov(Dest, T);
|
| return;
|
| }
|
|
|