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Side by Side Diff: src/mips/lithium-mips.h

Issue 16381006: Change PC for OSR entries to point to something more sensible (i.e. the first UnknownOsrValue), rem… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Add --always-osr flag. Created 7 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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2547 2547
2548 LOperand* object() { return inputs_[0]; } 2548 LOperand* object() { return inputs_[0]; }
2549 LOperand* key() { return inputs_[1]; } 2549 LOperand* key() { return inputs_[1]; }
2550 2550
2551 DECLARE_CONCRETE_INSTRUCTION(DeleteProperty, "delete-property") 2551 DECLARE_CONCRETE_INSTRUCTION(DeleteProperty, "delete-property")
2552 }; 2552 };
2553 2553
2554 2554
2555 class LOsrEntry: public LTemplateInstruction<0, 0, 0> { 2555 class LOsrEntry: public LTemplateInstruction<0, 0, 0> {
2556 public: 2556 public:
2557 LOsrEntry(); 2557 LOsrEntry() {}
2558 2558
2559 virtual bool HasInterestingComment(LCodeGen* gen) const { return false; } 2559 virtual bool HasInterestingComment(LCodeGen* gen) const { return false; }
2560 DECLARE_CONCRETE_INSTRUCTION(OsrEntry, "osr-entry") 2560 DECLARE_CONCRETE_INSTRUCTION(OsrEntry, "osr-entry")
2561
2562 LOperand** SpilledRegisterArray() { return register_spills_; }
2563 LOperand** SpilledDoubleRegisterArray() { return double_register_spills_; }
2564
2565 void MarkSpilledRegister(int allocation_index, LOperand* spill_operand);
2566 void MarkSpilledDoubleRegister(int allocation_index,
2567 LOperand* spill_operand);
2568
2569 private:
2570 // Arrays of spill slot operands for registers with an assigned spill
2571 // slot, i.e., that must also be restored to the spill slot on OSR entry.
2572 // NULL if the register has no assigned spill slot. Indexed by allocation
2573 // index.
2574 LOperand* register_spills_[Register::kMaxNumAllocatableRegisters];
2575 LOperand* double_register_spills_[
2576 DoubleRegister::kMaxNumAllocatableRegisters];
2577 }; 2561 };
2578 2562
2579 2563
2580 class LStackCheck: public LTemplateInstruction<0, 0, 0> { 2564 class LStackCheck: public LTemplateInstruction<0, 0, 0> {
2581 public: 2565 public:
2582 DECLARE_CONCRETE_INSTRUCTION(StackCheck, "stack-check") 2566 DECLARE_CONCRETE_INSTRUCTION(StackCheck, "stack-check")
2583 DECLARE_HYDROGEN_ACCESSOR(StackCheck) 2567 DECLARE_HYDROGEN_ACCESSOR(StackCheck)
2584 2568
2585 Label* done_label() { return &done_label_; } 2569 Label* done_label() { return &done_label_; }
2586 2570
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2839 2823
2840 DISALLOW_COPY_AND_ASSIGN(LChunkBuilder); 2824 DISALLOW_COPY_AND_ASSIGN(LChunkBuilder);
2841 }; 2825 };
2842 2826
2843 #undef DECLARE_HYDROGEN_ACCESSOR 2827 #undef DECLARE_HYDROGEN_ACCESSOR
2844 #undef DECLARE_CONCRETE_INSTRUCTION 2828 #undef DECLARE_CONCRETE_INSTRUCTION
2845 2829
2846 } } // namespace v8::internal 2830 } } // namespace v8::internal
2847 2831
2848 #endif // V8_MIPS_LITHIUM_MIPS_H_ 2832 #endif // V8_MIPS_LITHIUM_MIPS_H_
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