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Side by Side Diff: src/ia32/lithium-ia32.h

Issue 16381006: Change PC for OSR entries to point to something more sensible (i.e. the first UnknownOsrValue), rem… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Add --always-osr flag. Created 7 years, 6 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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2684 LOperand* context() { return inputs_[0]; } 2684 LOperand* context() { return inputs_[0]; }
2685 LOperand* object() { return inputs_[1]; } 2685 LOperand* object() { return inputs_[1]; }
2686 LOperand* key() { return inputs_[2]; } 2686 LOperand* key() { return inputs_[2]; }
2687 2687
2688 DECLARE_CONCRETE_INSTRUCTION(DeleteProperty, "delete-property") 2688 DECLARE_CONCRETE_INSTRUCTION(DeleteProperty, "delete-property")
2689 }; 2689 };
2690 2690
2691 2691
2692 class LOsrEntry: public LTemplateInstruction<0, 0, 0> { 2692 class LOsrEntry: public LTemplateInstruction<0, 0, 0> {
2693 public: 2693 public:
2694 LOsrEntry(); 2694 LOsrEntry() {}
2695 2695
2696 virtual bool HasInterestingComment(LCodeGen* gen) const { return false; } 2696 virtual bool HasInterestingComment(LCodeGen* gen) const { return false; }
2697 DECLARE_CONCRETE_INSTRUCTION(OsrEntry, "osr-entry") 2697 DECLARE_CONCRETE_INSTRUCTION(OsrEntry, "osr-entry")
2698
2699 LOperand** SpilledRegisterArray() { return register_spills_; }
2700 LOperand** SpilledDoubleRegisterArray() { return double_register_spills_; }
2701
2702 void MarkSpilledRegister(int allocation_index, LOperand* spill_operand);
2703 void MarkSpilledDoubleRegister(int allocation_index,
2704 LOperand* spill_operand);
2705
2706 private:
2707 // Arrays of spill slot operands for registers with an assigned spill
2708 // slot, i.e., that must also be restored to the spill slot on OSR entry.
2709 // NULL if the register has no assigned spill slot. Indexed by allocation
2710 // index.
2711 LOperand* register_spills_[Register::kMaxNumAllocatableRegisters];
2712 LOperand* double_register_spills_[
2713 DoubleRegister::kMaxNumAllocatableRegisters];
2714 }; 2698 };
2715 2699
2716 2700
2717 class LStackCheck: public LTemplateInstruction<0, 1, 0> { 2701 class LStackCheck: public LTemplateInstruction<0, 1, 0> {
2718 public: 2702 public:
2719 explicit LStackCheck(LOperand* context) { 2703 explicit LStackCheck(LOperand* context) {
2720 inputs_[0] = context; 2704 inputs_[0] = context;
2721 } 2705 }
2722 2706
2723 LOperand* context() { return inputs_[0]; } 2707 LOperand* context() { return inputs_[0]; }
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2998 2982
2999 DISALLOW_COPY_AND_ASSIGN(LChunkBuilder); 2983 DISALLOW_COPY_AND_ASSIGN(LChunkBuilder);
3000 }; 2984 };
3001 2985
3002 #undef DECLARE_HYDROGEN_ACCESSOR 2986 #undef DECLARE_HYDROGEN_ACCESSOR
3003 #undef DECLARE_CONCRETE_INSTRUCTION 2987 #undef DECLARE_CONCRETE_INSTRUCTION
3004 2988
3005 } } // namespace v8::internal 2989 } } // namespace v8::internal
3006 2990
3007 #endif // V8_IA32_LITHIUM_IA32_H_ 2991 #endif // V8_IA32_LITHIUM_IA32_H_
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