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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1636513002: Clean up emitInst() in the integrated ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Remove ifdef 0 code. Created 4 years, 11 months ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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448 DA_W = (0 | 0 | 1) << 21, // decrement after with writeback to base 448 DA_W = (0 | 0 | 1) << 21, // decrement after with writeback to base
449 IA_W = (0 | 4 | 1) << 21, // increment after with writeback to base 449 IA_W = (0 | 4 | 1) << 21, // increment after with writeback to base
450 DB_W = (8 | 0 | 1) << 21, // decrement before with writeback to base 450 DB_W = (8 | 0 | 1) << 21, // decrement before with writeback to base
451 IB_W = (8 | 4 | 1) << 21 // increment before with writeback to base 451 IB_W = (8 | 4 | 1) << 21 // increment before with writeback to base
452 }; 452 };
453 453
454 Label *getOrCreateLabel(SizeT Number, LabelVector &Labels); 454 Label *getOrCreateLabel(SizeT Number, LabelVector &Labels);
455 455
456 void bindCfgNodeLabel(const CfgNode *Node) override; 456 void bindCfgNodeLabel(const CfgNode *Node) override;
457 457
458 void emitInst(IValueT Value) { Buffer.emit<IValueT>(Value); } 458 void emitInst(IValueT Value) {
459 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
Jim Stichnoth 2016/01/25 16:57:14 John has a coding style I like where these RAII pl
Karl 2016/01/25 17:14:07 I really don't like this style! However, if we are
460 Buffer.emit<IValueT>(Value);
461 }
459 462
460 // List of possible checks to apply when calling emitType01() (below). 463 // List of possible checks to apply when calling emitType01() (below).
461 enum EmitChecks { NoChecks, RdIsPcAndSetFlags }; 464 enum EmitChecks { NoChecks, RdIsPcAndSetFlags };
462 465
463 // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=InstType, 466 // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=InstType,
464 // s=SetFlags, oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM 467 // s=SetFlags, oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM
465 // section A5.2.3). 468 // section A5.2.3).
466 void emitType01(CondARM32::Cond Cond, IValueT InstType, IValueT Opcode, 469 void emitType01(CondARM32::Cond Cond, IValueT InstType, IValueT Opcode,
467 bool SetFlags, IValueT Rn, IValueT Rd, IValueT imm12, 470 bool SetFlags, IValueT Rn, IValueT Rd, IValueT imm12,
468 EmitChecks RuleChecks, const char *InstName); 471 EmitChecks RuleChecks, const char *InstName);
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578 581
579 // Emit VFP instruction with 3 S registers. 582 // Emit VFP instruction with 3 S registers.
580 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn, 583 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn,
581 IValueT Sm); 584 IValueT Sm);
582 }; 585 };
583 586
584 } // end of namespace ARM32 587 } // end of namespace ARM32
585 } // end of namespace Ice 588 } // end of namespace Ice
586 589
587 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 590 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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