Add the VMRS instruction to the integrated ARM assembler.

src/IceInstARM32.h

 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1365 matching lines @@
 class InstARM32Vmrs final : public InstARM32Pred {
   InstARM32Vmrs() = delete;
   InstARM32Vmrs(const InstARM32Vmrs &) = delete;
   InstARM32Vmrs &operator=(const InstARM32Vmrs &) = delete;
 
 public:
   static InstARM32Vmrs *create(Cfg *Func, CondARM32::Cond Predicate) {
     return new (Func->allocate<InstARM32Vmrs>()) InstARM32Vmrs(Func, Predicate);
   }
   void emit(const Cfg *Func) const override;
+  void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override;
   static bool classof(const Inst *Inst) { return isClassof(Inst, Vmrs); }
 
 private:
   InstARM32Vmrs(Cfg *Func, CondARM32::Cond Predicate);
 };
 
 class InstARM32Vabs final : public InstARM32Pred {
   InstARM32Vabs() = delete;
   InstARM32Vabs(const InstARM32Vabs &) = delete;
@@ skipping 37 matching lines @@
 // violations and link errors.
 
 template <> void InstARM32Ldr::emit(const Cfg *Func) const;
 template <> void InstARM32Movw::emit(const Cfg *Func) const;
 template <> void InstARM32Movt::emit(const Cfg *Func) const;
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTARM32_H