Add the VMRS instruction to the integrated ARM assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1980 matching lines @@
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\t"
          "vmrs" << getPredicate() << "\t"
                                      "APSR_nzcv"
                                      ", "
                                      "FPSCR";
 }
 
+void InstARM32Vmrs::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  Asm->vmrsAPSR_nzcv(getPredicate());
+  assert(!Asm->needsTextFixup());
+}
+
 void InstARM32Vmrs::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "APSR{n,z,v,c} = vmrs" << getPredicate() << "\t"
                                                      "FPSCR{n,z,c,v}";
 }
 
 void InstARM32Vabs::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
@@ skipping 286 matching lines @@
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace ARM32
 } // end of namespace Ice