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| 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// | 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 635 } | 635 } |
| 636 | 636 |
| 637 template <> void InstARM32Veor::emitIAS(const Cfg *Func) const { | 637 template <> void InstARM32Veor::emitIAS(const Cfg *Func) const { |
| 638 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); | 638 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 639 const Variable *Dest = getDest(); | 639 const Variable *Dest = getDest(); |
| 640 assert(Dest->getType() == IceType_f64); | 640 assert(Dest->getType() == IceType_f64); |
| 641 Asm->veord(Dest, getSrc(0), getSrc(1)); | 641 Asm->veord(Dest, getSrc(0), getSrc(1)); |
| 642 assert(!Asm->needsTextFixup()); | 642 assert(!Asm->needsTextFixup()); |
| 643 } | 643 } |
| 644 | 644 |
| 645 template <> void InstARM32Vmla::emitIAS(const Cfg *Func) const { |
| 646 // Note: Dest == getSrc(0) for four address FP instructions. |
| 647 assert(getSrcSize() == 3); |
| 648 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 649 const Variable *Dest = getDest(); |
| 650 switch (Dest->getType()) { |
| 651 default: |
| 652 // TODO(kschimpf) Figure out how vector operations apply. |
| 653 emitUsingTextFixup(Func); |
| 654 break; |
| 655 case IceType_f32: |
| 656 Asm->vmlas(getDest(), getSrc(1), getSrc(2), CondARM32::AL); |
| 657 assert(!Asm->needsTextFixup()); |
| 658 break; |
| 659 case IceType_f64: |
| 660 Asm->vmlad(getDest(), getSrc(1), getSrc(2), CondARM32::AL); |
| 661 assert(!Asm->needsTextFixup()); |
| 662 break; |
| 663 } |
| 664 } |
| 665 |
| 645 template <> void InstARM32Vsub::emitIAS(const Cfg *Func) const { | 666 template <> void InstARM32Vsub::emitIAS(const Cfg *Func) const { |
| 646 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); | 667 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 647 const Variable *Dest = getDest(); | 668 const Variable *Dest = getDest(); |
| 648 switch (Dest->getType()) { | 669 switch (Dest->getType()) { |
| 649 default: | 670 default: |
| 650 // TODO(kschimpf) Figure if more cases are needed. | 671 // TODO(kschimpf) Figure if more cases are needed. |
| 651 Asm->setNeedsTextFixup(); | 672 Asm->setNeedsTextFixup(); |
| 652 break; | 673 break; |
| 653 case IceType_f32: | 674 case IceType_f32: |
| 654 Asm->vsubs(getDest(), getSrc(0), getSrc(1), CondARM32::AL); | 675 Asm->vsubs(getDest(), getSrc(0), getSrc(1), CondARM32::AL); |
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| 2330 | 2351 |
| 2331 template class InstARM32FourAddrGPR<InstARM32::Mla>; | 2352 template class InstARM32FourAddrGPR<InstARM32::Mla>; |
| 2332 template class InstARM32FourAddrGPR<InstARM32::Mls>; | 2353 template class InstARM32FourAddrGPR<InstARM32::Mls>; |
| 2333 | 2354 |
| 2334 template class InstARM32CmpLike<InstARM32::Cmn>; | 2355 template class InstARM32CmpLike<InstARM32::Cmn>; |
| 2335 template class InstARM32CmpLike<InstARM32::Cmp>; | 2356 template class InstARM32CmpLike<InstARM32::Cmp>; |
| 2336 template class InstARM32CmpLike<InstARM32::Tst>; | 2357 template class InstARM32CmpLike<InstARM32::Tst>; |
| 2337 | 2358 |
| 2338 } // end of namespace ARM32 | 2359 } // end of namespace ARM32 |
| 2339 } // end of namespace Ice | 2360 } // end of namespace Ice |
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