MIPS: Use PC realitive instructions on r6.

test/cctest/test-macro-assembler-mips64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 210 matching lines @@
 
 
 TEST(jump_tables4) {
   // Similar to test-assembler-mips jump_tables1, with extra test for branch
   // trampoline required before emission of the dd table (where trampolines are
   // blocked), and proper transition to long-branch mode.
   // Regression test for v8:4294.
   CcTest::InitializeVM();
   Isolate* isolate = CcTest::i_isolate();
   HandleScope scope(isolate);
-  MacroAssembler assembler(isolate, NULL, 0,
+  MacroAssembler assembler(isolate, nullptr, 0,
                            v8::internal::CodeObjectRequired::kYes);
   MacroAssembler* masm = &assembler;
 
   const int kNumCases = 512;
   int values[kNumCases];
   isolate->random_number_generator()->NextBytes(values, sizeof(values));
   Label labels[kNumCases];
-  Label near_start, end;
+  Label near_start, end, done;
 
-  __ daddiu(sp, sp, -8);
-  __ sd(ra, MemOperand(sp));
-
+  __ Push(ra);
   __ mov(v0, zero_reg);
 
   __ Branch(&end);
   __ bind(&near_start);
 
   // Generate slightly less than 32K instructions, which will soon require
   // trampoline for branch distance fixup.
   for (int i = 0; i < 32768 - 256; ++i) {
     __ addiu(v0, v0, 1);
   }
 
-  __ Align(8);
-  Label done;
-  {
-    __ BlockTrampolinePoolFor(kNumCases * 2 + 6);
-    PredictableCodeSizeScope predictable(
-        masm, (kNumCases * 2 + 6) * Assembler::kInstrSize);
-    Label here;
-
-    __ bal(&here);
-    __ dsll(at, a0, 3);  // In delay slot.
-    __ bind(&here);
-    __ daddu(at, at, ra);
-    __ ld(at, MemOperand(at, 4 * Assembler::kInstrSize));
-    __ jr(at);
-    __ nop();  // Branch delay slot nop.
-    for (int i = 0; i < kNumCases; ++i) {
-      __ dd(&labels[i]);
-    }
-  }
+  __ GenerateSwitchTable(a0, kNumCases,
+                         [&labels](size_t i) { return labels + i; });
 
   for (int i = 0; i < kNumCases; ++i) {
     __ bind(&labels[i]);
-    __ lui(v0, (values[i] >> 16) & 0xffff);
-    __ ori(v0, v0, values[i] & 0xffff);
+    __ li(v0, values[i]);
     __ Branch(&done);
   }
 
   __ bind(&done);
-  __ ld(ra, MemOperand(sp));
-  __ daddiu(sp, sp, 8);
+  __ Pop(ra);
   __ jr(ra);
   __ nop();
 
   __ bind(&end);
   __ Branch(&near_start);
 
   CodeDesc desc;
   masm->GetCode(&desc);
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
@@ skipping 21 matching lines @@
   MacroAssembler assembler(isolate, nullptr, 0,
                            v8::internal::CodeObjectRequired::kYes);
   MacroAssembler* masm = &assembler;
 
   const int kNumCases = 512;
   int values[kNumCases];
   isolate->random_number_generator()->NextBytes(values, sizeof(values));
   Label labels[kNumCases];
   Label done;
 
-  __ daddiu(sp, sp, -8);
-  __ sd(ra, MemOperand(sp));
+  __ Push(ra);
 
-  __ Align(8);
+  // Opposite of Align(8) as we have unaligned number of instructions in the
+  // following block before the first dd().
+  if ((masm->pc_offset() & 7) == 0) {
+    __ nop();
+  }
+
   {
-    __ BlockTrampolinePoolFor(kNumCases * 2 + 7 + 1);
+    __ BlockTrampolinePoolFor(kNumCases * 2 + 6 + 1);
     PredictableCodeSizeScope predictable(
-        masm, kNumCases * kPointerSize + ((7 + 1) * Assembler::kInstrSize));
-    Label here;
+        masm, kNumCases * kPointerSize + ((6 + 1) * Assembler::kInstrSize));
 
-    __ bal(&here);
-    __ dsll(at, a0, 3);  // In delay slot.
-    __ bind(&here);
-    __ daddu(at, at, ra);
-    __ ld(at, MemOperand(at, 6 * Assembler::kInstrSize));
+    __ addiupc(at, 6 + 1);
+    __ dlsa(at, at, a0, 3);
+    __ ld(at, MemOperand(at));
     __ jalr(at);
     __ nop();  // Branch delay slot nop.
     __ bc(&done);
     // A nop instruction must be generated by the forbidden slot guard
     // (Assembler::dd(Label*)) so the first label goes to an 8 bytes aligned
     // location.
     for (int i = 0; i < kNumCases; ++i) {
       __ dd(&labels[i]);
     }
   }
 
   for (int i = 0; i < kNumCases; ++i) {
     __ bind(&labels[i]);
-    __ lui(v0, (values[i] >> 16) & 0xffff);
-    __ ori(v0, v0, values[i] & 0xffff);
+    __ li(v0, values[i]);
     __ jr(ra);
     __ nop();
   }
 
   __ bind(&done);
-  __ ld(ra, MemOperand(sp));
-  __ daddiu(sp, sp, 8);
+  __ Pop(ra);
   __ jr(ra);
   __ nop();
 
   CodeDesc desc;
   masm->GetCode(&desc);
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
 #ifdef OBJECT_PRINT
   code->Print(std::cout);
 #endif
@@ skipping 165 matching lines @@
   for (size_t i = 0; i < nr_test_cases; ++i) {
     uint64_t res = run_dlsa(tc[i].rt, tc[i].rs, tc[i].sa);
     PrintF("0x%" PRIx64 " =? 0x%" PRIx64 " == Dlsa(v0, %" PRIx64 ", %" PRIx64
            ", %hhu)\n",
            tc[i].expected_res, res, tc[i].rt, tc[i].rs, tc[i].sa);
     CHECK_EQ(tc[i].expected_res, res);
   }
 }
 
 #undef __