MIPS: Use PC realitive instructions on r6.

src/mips64/code-stubs-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #if V8_TARGET_ARCH_MIPS64
 
 #include "src/bootstrapper.h"
 #include "src/code-stubs.h"
 #include "src/codegen.h"
 #include "src/ic/handler-compiler.h"
@@ skipping 1105 matching lines @@
     __ mov(a2, s1);
     __ mov(a1, a0);
     __ mov(a0, sp);
   }
 
   // To let the GC traverse the return address of the exit frames, we need to
   // know where the return address is. The CEntryStub is unmovable, so
   // we can store the address on the stack to be able to find it again and
   // we never have to restore it, because it will not change.
   { Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm);
-    // This branch-and-link sequence is needed to find the current PC on mips,
-    // saved to the ra register.
-    // Use masm-> here instead of the double-underscore macro since extra
-    // coverage code can interfere with the proper calculation of ra.
+    int numInstructionsToJump;
     Label find_ra;
-    __ bal(&find_ra);  // bal exposes branch delay slot.
-    __ nop();
-    __ bind(&find_ra);
-
     // Adjust the value in ra to point to the correct return location, 2nd
     // instruction past the real call into C code (the jalr(t9)), and push it.
     // This is the return address of the exit frame.
-    const int kNumInstructionsToJump = 5;
-    __ Daddu(ra, ra, kNumInstructionsToJump * kInt32Size);
+    if (kArchVariant >= kMips64r6) {
+      numInstructionsToJump = 4;
+      __ addiupc(ra, numInstructionsToJump + 1);
+    } else {
+      numInstructionsToJump = 5;
+      // This branch-and-link sequence is needed to find the current PC on mips
+      // before r6, saved to the ra register.
+      __ bal(&find_ra);  // bal exposes branch delay slot.
+      __ Daddu(ra, ra, numInstructionsToJump * Instruction::kInstrSize);
+    }
+
+    __ bind(&find_ra);
     // This spot was reserved in EnterExitFrame.
     __ sd(ra, MemOperand(sp, result_stack_size));
     // Stack space reservation moved to the branch delay slot below.
     // Stack is still aligned.
 
     // Call the C routine.
     __ mov(t9, s2);  // Function pointer to t9 to conform to ABI for PIC.
     __ jalr(t9);
     // Set up sp in the delay slot.
     __ daddiu(sp, sp, -kCArgsSlotsSize);
     // Make sure the stored 'ra' points to this position.
-    DCHECK_EQ(kNumInstructionsToJump,
+    DCHECK_EQ(numInstructionsToJump,
               masm->InstructionsGeneratedSince(&find_ra));
   }
   if (result_size() > 2) {
     DCHECK_EQ(3, result_size());
     // Read result values stored on stack.
     __ ld(a0, MemOperand(v0, 2 * kPointerSize));
     __ ld(v1, MemOperand(v0, 1 * kPointerSize));
     __ ld(v0, MemOperand(v0, 0 * kPointerSize));
   }
   // Result returned in v0, v1:v0 or a0:v1:v0 - do not destroy these registers!
@@ skipping 4515 matching lines @@
                            return_value_operand, NULL);
 }
 
 
 #undef __
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_MIPS64