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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 1628453002: MIPS: Use PC realitive instructions on r6. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 11 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h" 10 #include "src/mips/assembler-mips.h"
(...skipping 624 matching lines...) Expand 10 before | Expand all | Expand 10 after
635 #undef DEFINE_INSTRUCTION 635 #undef DEFINE_INSTRUCTION
636 #undef DEFINE_INSTRUCTION2 636 #undef DEFINE_INSTRUCTION2
637 #undef DEFINE_INSTRUCTION3 637 #undef DEFINE_INSTRUCTION3
638 638
639 void Lsa(Register rd, Register rs, Register rt, uint8_t sa, 639 void Lsa(Register rd, Register rs, Register rt, uint8_t sa,
640 Register scratch = at); 640 Register scratch = at);
641 void Pref(int32_t hint, const MemOperand& rs); 641 void Pref(int32_t hint, const MemOperand& rs);
642 642
643 643
644 // --------------------------------------------------------------------------- 644 // ---------------------------------------------------------------------------
645 // PC relative instructions.
646
647 void Addiupc(Register rs, int32_t imm21) {
648 DCHECK_EQ(imm21 & 3, 0);
649 addiupc(rs, imm21 >> 2);
650 }
651
652 void Lwpc(Register rs, int32_t imm21) {
653 DCHECK_EQ(imm21 & 3, 0);
654 lwpc(rs, imm21 >> 2);
655 }
656
657
658 // ---------------------------------------------------------------------------
645 // Pseudo-instructions. 659 // Pseudo-instructions.
646 660
647 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } 661 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
648 662
649 void Ulw(Register rd, const MemOperand& rs); 663 void Ulw(Register rd, const MemOperand& rs);
650 void Usw(Register rd, const MemOperand& rs); 664 void Usw(Register rd, const MemOperand& rs);
651 665
652 // Load int32 in the rd register. 666 // Load int32 in the rd register.
653 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE); 667 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
654 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) { 668 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {
(...skipping 1099 matching lines...) Expand 10 before | Expand all | Expand 10 after
1754 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1768 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1755 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1769 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1756 #else 1770 #else
1757 #define ACCESS_MASM(masm) masm-> 1771 #define ACCESS_MASM(masm) masm->
1758 #endif 1772 #endif
1759 1773
1760 } // namespace internal 1774 } // namespace internal
1761 } // namespace v8 1775 } // namespace v8
1762 1776
1763 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1777 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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