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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include <math.h> // for isnan. | 5 #include <math.h> // for isnan. |
| 6 #include <setjmp.h> | 6 #include <setjmp.h> |
| 7 #include <stdlib.h> | 7 #include <stdlib.h> |
| 8 | 8 |
| 9 #include "vm/globals.h" | 9 #include "vm/globals.h" |
| 10 #if defined(TARGET_ARCH_MIPS) | 10 #if defined(TARGET_ARCH_MIPS) |
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| 1060 // Format(instr, "divu 'rs, 'rt"); | 1060 // Format(instr, "divu 'rs, 'rt"); |
| 1061 uint32_t rs_val = get_register(instr->RsField()); | 1061 uint32_t rs_val = get_register(instr->RsField()); |
| 1062 uint32_t rt_val = get_register(instr->RtField()); | 1062 uint32_t rt_val = get_register(instr->RtField()); |
| 1063 if (rt_val == 0) { | 1063 if (rt_val == 0) { |
| 1064 // Results are unpredictable. | 1064 // Results are unpredictable. |
| 1065 set_hi_register(0); | 1065 set_hi_register(0); |
| 1066 set_lo_register(0); | 1066 set_lo_register(0); |
| 1067 // TODO(zra): Drop into the debugger here. | 1067 // TODO(zra): Drop into the debugger here. |
| 1068 break; | 1068 break; |
| 1069 } | 1069 } |
| 1070 | |
| 1071 set_lo_register(rs_val / rt_val); | 1070 set_lo_register(rs_val / rt_val); |
| 1072 set_hi_register(rs_val % rt_val); | 1071 set_hi_register(rs_val % rt_val); |
| 1073 break; | 1072 break; |
| 1074 } | 1073 } |
| 1075 case JALR: { | 1074 case JALR: { |
| 1076 ASSERT(instr->RtField() == R0); | 1075 ASSERT(instr->RtField() == R0); |
| 1077 ASSERT(instr->RsField() != instr->RdField()); | 1076 ASSERT(instr->RsField() != instr->RdField()); |
| 1078 ASSERT(!delay_slot_); | 1077 ASSERT(!delay_slot_); |
| 1079 // Format(instr, "jalr'hint 'rd, rs"); | 1078 // Format(instr, "jalr'hint 'rd, rs"); |
| 1080 set_register(instr->RdField(), pc_ + 2*Instr::kInstrSize); | 1079 set_register(instr->RdField(), pc_ + 2*Instr::kInstrSize); |
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| 1123 case MOVZ: { | 1122 case MOVZ: { |
| 1124 ASSERT(instr->SaField() == 0); | 1123 ASSERT(instr->SaField() == 0); |
| 1125 // Format(instr, "movz 'rd, 'rs, 'rt"); | 1124 // Format(instr, "movz 'rd, 'rs, 'rt"); |
| 1126 int32_t rt_val = get_register(instr->RtField()); | 1125 int32_t rt_val = get_register(instr->RtField()); |
| 1127 int32_t rs_val = get_register(instr->RsField()); | 1126 int32_t rs_val = get_register(instr->RsField()); |
| 1128 if (rt_val == 0) { | 1127 if (rt_val == 0) { |
| 1129 set_register(instr->RdField(), rs_val); | 1128 set_register(instr->RdField(), rs_val); |
| 1130 } | 1129 } |
| 1131 break; | 1130 break; |
| 1132 } | 1131 } |
| 1132 case MTHI: { |
| 1133 ASSERT(instr->RtField() == 0); |
| 1134 ASSERT(instr->RdField() == 0); |
| 1135 ASSERT(instr->SaField() == 0); |
| 1136 // Format(instr, "mthi 'rd"); |
| 1137 set_hi_register(get_register(instr->RsField())); |
| 1138 break; |
| 1139 } |
| 1140 case MTLO: { |
| 1141 ASSERT(instr->RtField() == 0); |
| 1142 ASSERT(instr->RdField() == 0); |
| 1143 ASSERT(instr->SaField() == 0); |
| 1144 // Format(instr, "mflo 'rd"); |
| 1145 set_lo_register(get_register(instr->RsField())); |
| 1146 break; |
| 1147 } |
| 1133 case MULT: { | 1148 case MULT: { |
| 1134 ASSERT(instr->RdField() == 0); | 1149 ASSERT(instr->RdField() == 0); |
| 1135 ASSERT(instr->SaField() == 0); | 1150 ASSERT(instr->SaField() == 0); |
| 1136 // Format(instr, "mult 'rs, 'rt"); | 1151 // Format(instr, "mult 'rs, 'rt"); |
| 1137 int64_t rs = static_cast<int64_t>(get_register(instr->RsField())); | 1152 int64_t rs = static_cast<int64_t>(get_register(instr->RsField())); |
| 1138 int64_t rt = static_cast<int64_t>(get_register(instr->RtField())); | 1153 int64_t rt = static_cast<int64_t>(get_register(instr->RtField())); |
| 1139 int64_t res = rs * rt; | 1154 int64_t res = rs * rt; |
| 1140 set_hi_register(Utils::High32Bits(res)); | 1155 set_hi_register(Utils::High32Bits(res)); |
| 1141 set_lo_register(Utils::Low32Bits(res)); | 1156 set_lo_register(Utils::Low32Bits(res)); |
| 1142 break; | 1157 break; |
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| 1259 UnimplementedInstruction(instr); | 1274 UnimplementedInstruction(instr); |
| 1260 break; | 1275 break; |
| 1261 } | 1276 } |
| 1262 } | 1277 } |
| 1263 } | 1278 } |
| 1264 | 1279 |
| 1265 | 1280 |
| 1266 void Simulator::DecodeSpecial2(Instr* instr) { | 1281 void Simulator::DecodeSpecial2(Instr* instr) { |
| 1267 ASSERT(instr->OpcodeField() == SPECIAL2); | 1282 ASSERT(instr->OpcodeField() == SPECIAL2); |
| 1268 switch (instr->FunctionField()) { | 1283 switch (instr->FunctionField()) { |
| 1284 case MADD: { |
| 1285 ASSERT(instr->RdField() == 0); |
| 1286 ASSERT(instr->SaField() == 0); |
| 1287 // Format(instr, "madd 'rs, 'rt"); |
| 1288 uint32_t lo = get_lo_register(); |
| 1289 int32_t hi = get_hi_register(); |
| 1290 int64_t accum = Utils::LowHighTo64Bits(lo, hi); |
| 1291 int64_t rs = static_cast<int64_t>(get_register(instr->RsField())); |
| 1292 int64_t rt = static_cast<int64_t>(get_register(instr->RtField())); |
| 1293 int64_t res = accum + rs * rt; |
| 1294 set_hi_register(Utils::High32Bits(res)); |
| 1295 set_lo_register(Utils::Low32Bits(res)); |
| 1296 break; |
| 1297 } |
| 1298 case MADDU: { |
| 1299 ASSERT(instr->RdField() == 0); |
| 1300 ASSERT(instr->SaField() == 0); |
| 1301 // Format(instr, "maddu 'rs, 'rt"); |
| 1302 uint32_t lo = get_lo_register(); |
| 1303 uint32_t hi = get_hi_register(); |
| 1304 uint64_t accum = Utils::LowHighTo64Bits(lo, hi); |
| 1305 uint64_t rs = static_cast<int64_t>(get_register(instr->RsField())); |
| 1306 uint64_t rt = static_cast<int64_t>(get_register(instr->RtField())); |
| 1307 uint64_t res = accum + rs * rt; |
| 1308 set_hi_register(Utils::High32Bits(res)); |
| 1309 set_lo_register(Utils::Low32Bits(res)); |
| 1310 break; |
| 1311 } |
| 1269 case CLO: { | 1312 case CLO: { |
| 1270 ASSERT(instr->SaField() == 0); | 1313 ASSERT(instr->SaField() == 0); |
| 1271 ASSERT(instr->RtField() == instr->RdField()); | 1314 ASSERT(instr->RtField() == instr->RdField()); |
| 1272 // Format(instr, "clo 'rd, 'rs"); | 1315 // Format(instr, "clo 'rd, 'rs"); |
| 1273 int32_t rs_val = get_register(instr->RsField()); | 1316 int32_t rs_val = get_register(instr->RsField()); |
| 1274 int32_t bitcount = 0; | 1317 int32_t bitcount = 0; |
| 1275 while (rs_val < 0) { | 1318 while (rs_val < 0) { |
| 1276 bitcount++; | 1319 bitcount++; |
| 1277 rs_val <<= 1; | 1320 rs_val <<= 1; |
| 1278 } | 1321 } |
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| 2009 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); | 2052 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); |
| 2010 } | 2053 } |
| 2011 buf->Longjmp(); | 2054 buf->Longjmp(); |
| 2012 } | 2055 } |
| 2013 | 2056 |
| 2014 } // namespace dart | 2057 } // namespace dart |
| 2015 | 2058 |
| 2016 #endif // !defined(HOST_ARCH_MIPS) | 2059 #endif // !defined(HOST_ARCH_MIPS) |
| 2017 | 2060 |
| 2018 #endif // defined TARGET_ARCH_MIPS | 2061 #endif // defined TARGET_ARCH_MIPS |
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