Implements intrinsics for MIPS.

runtime/vm/assembler_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_MIPS_H_
 #define VM_ASSEMBLER_MIPS_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_mips.h directly; use assembler.h instead.
 #endif
@@ skipping 169 matching lines @@
   // RawInstruction object corresponding to the code running in the frame.
   // See EnterDartFrame. There are 6 instructions before we know the PC.
   static const intptr_t kEntryPointToPcMarkerOffset = 6 * Instr::kInstrSize;
 
   // Inlined allocation of an instance of class 'cls', code has no runtime
   // calls. Jump to 'failure' if the instance cannot be allocated here.
   // Allocated instance is returned in 'instance_reg'.
   // Only the tags field of the object is initialized.
   void TryAllocate(const Class& cls,
                    Label* failure,
-                   bool near_jump,
-                   Register instance_reg) {
-    UNIMPLEMENTED();
-  }
+                   Register instance_reg);
 
   // Debugging and bringup support.
   void Stop(const char* message);
 
   // TODO(zra): TraceSimMsg enables printing of helpful messages when
   // --trace_sim is given. Eventually these calls will be changed to Comment.
   void TraceSimMsg(const char* message);
   void Unimplemented(const char* message);
   void Untested(const char* message);
   void Unreachable(const char* message);
@@ skipping 312 matching lines @@
   }
 
   void lw(Register rt, const Address& addr) {
     EmitLoadStore(LW, rt, addr);
   }
 
   void lwc1(FRegister ft, const Address& addr) {
     EmitFpuLoadStore(LWC1, ft, addr);
   }
 
+  void madd(Register rs, Register rt) {
+    EmitRType(SPECIAL2, rs, rt, R0, 0, MADD);
+  }
+
+  void maddu(Register rs, Register rt) {
+    EmitRType(SPECIAL2, rs, rt, R0, 0, MADDU);
+  }
+
   void mfc1(Register rt, FRegister fs) {
     Emit(COP1 << kOpcodeShift |
          COP1_MF << kCop1SubShift |
          rt << kRtShift |
          fs << kFsShift);
   }
 
   void mfhi(Register rd) {
     EmitRType(SPECIAL, R0, R0, rd, 0, MFHI);
   }
@@ skipping 24 matching lines @@
     EmitFpuRType(COP1, FMT_S, F0, fs, fd, COP1_MOV);
   }
 
   void mtc1(Register rt, FRegister fs) {
     Emit(COP1 << kOpcodeShift |
          COP1_MT << kCop1SubShift |
          rt << kRtShift |
          fs << kFsShift);
   }
 
+  void mthi(Register rs) {
+    EmitRType(SPECIAL, rs, R0, R0, 0, MTHI);
+  }
+
+  void mtlo(Register rs) {
+    EmitRType(SPECIAL, rs, R0, R0, 0, MTLO);
+  }
+
   void muld(DRegister dd, DRegister ds, DRegister dt) {
     FRegister fd = static_cast<FRegister>(dd * 2);
     FRegister fs = static_cast<FRegister>(ds * 2);
     FRegister ft = static_cast<FRegister>(dt * 2);
     EmitFpuRType(COP1, FMT_D, ft, fs, fd, COP1_MUL);
   }
 
   void mult(Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, R0, 0, MULT);
   }
@@ skipping 592 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_MIPS_H_