| Index: runtime/vm/assembler_arm.cc
|
| ===================================================================
|
| --- runtime/vm/assembler_arm.cc (revision 23447)
|
| +++ runtime/vm/assembler_arm.cc (working copy)
|
| @@ -1555,6 +1555,11 @@
|
| }
|
|
|
|
|
| +void Assembler::Lsl(Register rd, Register rm, Register rs, Condition cond) {
|
| + mov(rd, ShifterOperand(rm, LSL, rs), cond);
|
| +}
|
| +
|
| +
|
| void Assembler::Lsr(Register rd, Register rm, uint32_t shift_imm,
|
| Condition cond) {
|
| ASSERT(shift_imm != 0); // Do not use Lsr if no shift is wanted.
|
| @@ -1563,6 +1568,11 @@
|
| }
|
|
|
|
|
| +void Assembler::Lsr(Register rd, Register rm, Register rs, Condition cond) {
|
| + mov(rd, ShifterOperand(rm, LSR, rs), cond);
|
| +}
|
| +
|
| +
|
| void Assembler::Asr(Register rd, Register rm, uint32_t shift_imm,
|
| Condition cond) {
|
| ASSERT(shift_imm != 0); // Do not use Asr if no shift is wanted.
|
| @@ -1571,6 +1581,11 @@
|
| }
|
|
|
|
|
| +void Assembler::Asr(Register rd, Register rm, Register rs, Condition cond) {
|
| + mov(rd, ShifterOperand(rm, ASR, rs), cond);
|
| +}
|
| +
|
| +
|
| void Assembler::Ror(Register rd, Register rm, uint32_t shift_imm,
|
| Condition cond) {
|
| ASSERT(shift_imm != 0); // Use Rrx instruction.
|
| @@ -1578,6 +1593,11 @@
|
| }
|
|
|
|
|
| +void Assembler::Ror(Register rd, Register rm, Register rs, Condition cond) {
|
| + mov(rd, ShifterOperand(rm, ROR, rs), cond);
|
| +}
|
| +
|
| +
|
| void Assembler::Rrx(Register rd, Register rm, Condition cond) {
|
| mov(rd, ShifterOperand(rm, ROR, 0), cond);
|
| }
|
|
|