Enable language tests on SIMARM and mark 14 of them as failing.

runtime/vm/flow_graph_compiler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "lib/error.h"
@@ skipping 1390 matching lines @@
                          token_pos);
     // Stub returns result in flags (result of a cmpl, we need ZF computed).
     __ Pop(right);
     __ Pop(left);
   } else {
     __ cmp(left, ShifterOperand(right));
   }
 }
 
 
+// Implement equality spec: if any of the arguments is null do identity check.
+// Fallthrough calls super equality.
 void FlowGraphCompiler::EmitSuperEqualityCallPrologue(Register result,
                                                       Label* skip_call) {
-  UNIMPLEMENTED();
+  Label check_identity, fall_through;
+  __ LoadImmediate(IP, reinterpret_cast<intptr_t>(Object::null()));
+  __ ldr(result, Address(SP, 0 * kWordSize));
+  __ cmp(result, ShifterOperand(IP));
+  __ mov(IP, ShifterOperand(result), EQ);
+  __ ldr(result, Address(SP, 1 * kWordSize));
+  __ b(&check_identity, EQ);
+  __ cmp(result, ShifterOperand(IP));
+  __ b(&fall_through, NE);

[zra, 2013/05/30 23:17:35]

The code is a bit dense up to here. A comment or two will help me translate to
MIPS =)

[regis, 2013/05/31 00:37:04]

:-)
Done and simplified a bit.
It will be easier for you to port the ia32 version.

+
+  __ ldr(IP, Address(SP, 0 * kWordSize));
+  __ Bind(&check_identity);
+  __ cmp(result, ShifterOperand(IP));
+  __ LoadObject(result, Bool::True(), EQ);
+  __ LoadObject(result, Bool::False(), NE);
+  __ Drop(2);
+  __ b(skip_call);
+  __ Bind(&fall_through);
 }
 
 
 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) {
   // TODO(vegorov): consider saving only caller save (volatile) registers.
   const intptr_t fpu_regs_count = locs->live_registers()->fpu_regs_count();
   if (fpu_regs_count > 0) {
     __ AddImmediate(SP, -(fpu_regs_count * kFpuRegisterSize));
     // Store fpu registers with the lowest register number at the lowest
     // address.
@@ skipping 88 matching lines @@
     assembler()->Bind(&next_test);
   }
   assembler()->Bind(&match_found);
 }
 
 
 void FlowGraphCompiler::EmitDoubleCompareBranch(Condition true_condition,
                                                 FpuRegister left,
                                                 FpuRegister right,
                                                 BranchInstr* branch) {
-  UNIMPLEMENTED();
+  ASSERT(branch != NULL);
+  assembler()->vcmpd(left, right);
+  assembler()->vmstat();
+  BlockEntryInstr* nan_result = (true_condition == NE) ?

[zra, 2013/05/30 23:17:35]

I'm not familiar with the spec here, but I thought that any comparison with NaN
usually results in false, even NE. Or is this instruction like this?

if(!(float1 op float2)) {} else {}

[regis, 2013/05/31 00:37:04]

In your example, the negation is outside of this instruction. It would be wrong
to propagate it down to the op level and compile a !op.
The special handling applies only to float1 != float2, which is true in the NaN
case (according to our Intel implementation).

+      branch->true_successor() : branch->false_successor();
+  assembler()->b(GetJumpLabel(nan_result), VS);
+  branch->EmitBranchOnCondition(this, true_condition);
 }
 
 
 void FlowGraphCompiler::EmitDoubleCompareBool(Condition true_condition,
                                               FpuRegister left,
                                               FpuRegister right,
                                               Register result) {
-  UNIMPLEMENTED();
+  assembler()->vcmpd(left, right);
+  assembler()->vmstat();
+  assembler()->LoadObject(result, Bool::False());
+  Label done;
+  assembler()->b(&done, VS);  // NaN -> false.
+  assembler()->LoadObject(result, Bool::True(), true_condition);
+  assembler()->Bind(&done);
 }
 
 
 // Do not impelement or use this function.
 FieldAddress FlowGraphCompiler::ElementAddressForIntIndex(intptr_t cid,
                                                           intptr_t index_scale,
                                                           Register array,
                                                           intptr_t index) {
   UNREACHABLE();
   return FieldAddress(array, index);
@@ skipping 210 matching lines @@
 void ParallelMoveResolver::RestoreFpuScratch(FpuRegister reg) {
   __ vldrd(reg, Address(SP, kDoubleSize, Address::PostIndex));
 }
 
 
 #undef __
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM