Add missing vcvt instructions to integrated ARM assembler.

tests_lit/assembler/arm32/vcvt.u32.f64.ll

Index: tests_lit/assembler/arm32/vcvt.u32.f64.ll
diff --git a/tests_lit/assembler/arm32/vcvt.s32.f32.ll b/tests_lit/assembler/arm32/vcvt.u32.f64.ll
similarity index 66%
copy from tests_lit/assembler/arm32/vcvt.s32.f32.ll
copy to tests_lit/assembler/arm32/vcvt.u32.f64.ll
index 94e99df7f3e78e92c2e926738977a79d34b9aa09..bc4ed78b913148b87ddbcc69a0efc1e4743db5e5 100644
--- a/tests_lit/assembler/arm32/vcvt.s32.f32.ll
+++ b/tests_lit/assembler/arm32/vcvt.u32.f64.ll
@@ -1,4 +1,4 @@
-; Show that we know how to translate converting float to signed integer.
+; Show that we know how to translate converting double to unsigned integer.
 
 ; REQUIRES: allow_dump
 
@@ -19,19 +19,17 @@
 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
 ; RUN:   --args -Om1 --reg-use=s20 | FileCheck %s --check-prefix=DIS
 
-define internal i32 @FloatToSignedInt() {
-; ASM-LABEL: FloatToSignedInt:
-; DIS-LABEL: 00000000 <FloatToSignedInt>:
-; IASM-LABEL: FloatToSignedInt:
+define internal i32 @DoubleToUnsignedInt() {
+; ASM-LABEL: DoubleToUnsignedInt:
+; DIS-LABEL: 00000000 <DoubleToUnsignedInt>:
 
 entry:
-; ASM-NEXT: .LFloatToSignedInt$entry:
-; IASM-NEXT: .LFloatToSignedInt$entry:
+; ASM: .LDoubleToUnsignedInt$entry:
 
-  %v = fptosi float 0.0 to i32
+  %v = fptoui double 0.0 to i32
 
-; ASM:  vcvt.s32.f32    s20, s20
-; DIS:   14:    eebdaaca
+; ASM:  vcvt.u32.f64    s20, d0
+; DIS:    c:    eebcabc0
 ; IASM-NOT: vcvt
 
   ret i32 %v