Add missing vcvt instructions to integrated ARM assembler.

tests_lit/assembler/arm32/vcvt.f32.u32.ll

Index: tests_lit/assembler/arm32/vcvt.f32.u32.ll
diff --git a/tests_lit/assembler/arm32/vcvt.s32.f32.ll b/tests_lit/assembler/arm32/vcvt.f32.u32.ll
similarity index 65%
copy from tests_lit/assembler/arm32/vcvt.s32.f32.ll
copy to tests_lit/assembler/arm32/vcvt.f32.u32.ll
index 94e99df7f3e78e92c2e926738977a79d34b9aa09..95f3b99fdbf23ee807e20218cc988773d9201c13 100644
--- a/tests_lit/assembler/arm32/vcvt.s32.f32.ll
+++ b/tests_lit/assembler/arm32/vcvt.f32.u32.ll
@@ -1,4 +1,4 @@
-; Show that we know how to translate converting float to signed integer.
+; Show that we know how to translate converting unsigned integer to floast.

[Jim Stichnoth, 2016/01/22 22:50:06]

float

[Karl, 2016/01/22 23:47:48]

Done.

 
 ; REQUIRES: allow_dump
 
@@ -19,20 +19,20 @@
 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
 ; RUN:   --args -Om1 --reg-use=s20 | FileCheck %s --check-prefix=DIS
 
-define internal i32 @FloatToSignedInt() {
-; ASM-LABEL: FloatToSignedInt:
-; DIS-LABEL: 00000000 <FloatToSignedInt>:
-; IASM-LABEL: FloatToSignedInt:
+define internal float @SignedIntToFloat() {
+; ASM-LABEL: SignedIntToFloat:
+; DIS-LABEL: 00000000 <SignedIntToFloat>:
+; IASM-LABEL: SignedIntToFloat:
 
 entry:
-; ASM-NEXT: .LFloatToSignedInt$entry:
-; IASM-NEXT: .LFloatToSignedInt$entry:
+; ASM: .LSignedIntToFloat$entry:
+; IASM: .LSignedIntToFloat$entry:
 
-  %v = fptosi float 0.0 to i32
+  %v = uitofp i32 17 to float
 
-; ASM:  vcvt.s32.f32    s20, s20
-; DIS:   14:    eebdaaca
+; ASM:  vcvt.f32.u32    s20, s20
+; DIS:  10:     eeb8aa4a
 ; IASM-NOT: vcvt
 
-  ret i32 %v
+  ret float %v
 }