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Issue 1623433004: Add missing vcvt instructions to integrated ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nit. Created 4 years, 11 months ago
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1 ; Show that we know how to translate converting float to signed integer. 1 ; Show that we know how to translate converting signed integer to double.
2 2
3 ; REQUIRES: allow_dump 3 ; REQUIRES: allow_dump
4 4
5 ; Compile using standalone assembler. 5 ; Compile using standalone assembler.
6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
7 ; RUN: --reg-use=s20 | FileCheck %s --check-prefix=ASM 7 ; RUN: --reg-use=s20 | FileCheck %s --check-prefix=ASM
8 8
9 ; Show bytes in assembled standalone code. 9 ; Show bytes in assembled standalone code.
10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
11 ; RUN: --args -Om1 --reg-use=s20 | FileCheck %s --check-prefix=DIS 11 ; RUN: --args -Om1 --reg-use=s20 | FileCheck %s --check-prefix=DIS
12 12
13 ; Compile using integrated assembler. 13 ; Compile using integrated assembler.
14 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 14 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
15 ; RUN: --reg-use=s20 \ 15 ; RUN: --reg-use=s20 \
16 ; RUN: | FileCheck %s --check-prefix=IASM 16 ; RUN: | FileCheck %s --check-prefix=IASM
17 17
18 ; Show bytes in assembled integrated code. 18 ; Show bytes in assembled integrated code.
19 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 19 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
20 ; RUN: --args -Om1 --reg-use=s20 | FileCheck %s --check-prefix=DIS 20 ; RUN: --args -Om1 --reg-use=s20 | FileCheck %s --check-prefix=DIS
21 21
22 define internal i32 @FloatToSignedInt() { 22 define internal double @SignedIntToDouble() {
23 ; ASM-LABEL: FloatToSignedInt: 23 ; ASM-LABEL: SignedIntToDouble:
24 ; DIS-LABEL: 00000000 <FloatToSignedInt>: 24 ; DIS-LABEL: 00000000 <SignedIntToDouble>:
25 ; IASM-LABEL: FloatToSignedInt: 25 ; IASM-LABEL: SignedIntToDouble:
26 26
27 entry: 27 entry:
28 ; ASM-NEXT: .LFloatToSignedInt$entry: 28 ; ASM: .LSignedIntToDouble$entry:
29 ; IASM-NEXT: .LFloatToSignedInt$entry: 29 ; IASM: .LSignedIntToDouble$entry:
30 30
31 %v = fptosi float 0.0 to i32 31 %v = sitofp i32 17 to double
32 32
33 ; ASM: vcvt.s32.f32 s20, s20 33 ; ASM: vcvt.f64.s32 d0, s20
34 ; DIS: 14: eebdaaca 34 ; DIS: 10: eeb80bca
35 ; IASM-NOT: vcvt 35 ; IASM-NOT: vcvt
36 36
37 ret i32 %v 37 ret double %v
38 } 38 }
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