Chromium Code Reviews| Index: tests_lit/assembler/arm32/vldr.vstr.imm.ll |
| diff --git a/tests_lit/assembler/arm32/veor.ll b/tests_lit/assembler/arm32/vldr.vstr.imm.ll |
| similarity index 54% |
| copy from tests_lit/assembler/arm32/veor.ll |
| copy to tests_lit/assembler/arm32/vldr.vstr.imm.ll |
| index 8b138a1760b417ec33bdd49500e25fb9dd3618bc..11fe2c5cf2e10f422d312552e698f43e4295bf40 100644 |
| --- a/tests_lit/assembler/arm32/veor.ll |
| +++ b/tests_lit/assembler/arm32/vldr.vstr.imm.ll |
| @@ -1,37 +1,45 @@ |
| -; Show that we know how to translate veor. Does this by noting that |
| -; loading a double 0.0 introduces a veor. |
| - |
| -; REQUIRES: allow_dump |
| +; Test vldrd and vstrd when address is offset with an immediate. |
|
Jim Stichnoth
2016/01/22 05:10:30
Did you mean "vldr and vstr"?
Karl
2016/01/22 16:24:29
This file doesn't test vstrs/vlds (or many other v
|
| ; Compile using standalone assembler. |
| ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ |
| +; RUN: -reg-use d20 \ |
| ; RUN: | FileCheck %s --check-prefix=ASM |
| ; Show bytes in assembled standalone code. |
| ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ |
| ; RUN: --args -Om1 \ |
| +; RUN: -reg-use d20 \ |
| ; RUN: | FileCheck %s --check-prefix=DIS |
| ; Compile using integrated assembler. |
| ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ |
| +; RUN: -reg-use d20 \ |
| ; RUN: | FileCheck %s --check-prefix=IASM |
| ; Show bytes in assembled integrated code. |
| ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ |
| ; RUN: --args -Om1 \ |
| +; RUN: -reg-use d20 \ |
| ; RUN: | FileCheck %s --check-prefix=DIS |
| -define internal double @testVeor() { |
| -; ASM-LABEL: testVeor: |
| -; DIS: 00000000 <testVeor>: |
| +define internal i64 @testVldrStrImm(double %d) { |
| +; ASM-LABEL: testVldrStrImm: |
| +; DIS-LABEL: 00000000 <testVldrStrImm>: |
| +; IASM-LABEL: testVldrStrImm: |
| entry: |
| -; ASM: .LtestVeor$entry: |
| +; ASM-NEXT: .LtestVldrStrImm$entry: |
| +; IASM-NEXT: .LtestVldrStrImm$entry: |
| + |
| +; ASM: vstr d0, [sp, #8] |
| +; DIS: 4: ed8d0b02 |
| +; IASM-NOT: vstr |
| - ret double 0.0 |
| + %v = bitcast double %d to i64 |
| -; ASM: veor.f64 d0, d0, d0 |
| -; DIS: 0: f3000110 |
| -; IASM-NOT: veor |
| +; ASM: vldr d20, [sp, #8] |
| +; DIS: 8: eddd4b02 |
| +; IASM-NOT: vldr |
| + ret i64 %v |
| } |