[Atomics] code stubs for atomic operations

src/arm/simulator-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_ARM
 
@@ skipping 3885 matching lines @@
           }
         }
       } else {
         UNIMPLEMENTED();
       }
       break;
     case 0xA:
     case 0xB:
       if ((instr->Bits(22, 20) == 5) && (instr->Bits(15, 12) == 0xf)) {
         // pld: ignore instruction.
+      } else if (instr->SpecialValue() == 0xA && instr->Bits(22, 20) == 7) {
+        // dsb, dmb, isb: ignore instruction for now.
+        // TODO(binji): implement

[Jarin, 2016/01/28 08:11:12]

How about having a global variable for the fences? Then we would atomically
increment it by 0 here. This should give us strong-enough guarantees for the
barriers, I think.

[binji, 2016/01/28 16:20:00]

Maybe... looking at http://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html, the
sequence for ARM we'll generate is:

  LoadSeqCst: ldr; dmb
  StoreSeqCst: dmb; str; dmb

it looks like we could translate dmb -> mfence:

  LoadSeqCst: mov; mfence
  StoreSeqCst: mfence; mov; mfence

This would then match the x86 SeqCst alternate implementation in that doc (with
extra fences):

  LoadSeqCst: mov
  StoreSeqCst: mov; mfence

But I'm not sure the atomic increment (probably xadd 0...?) would have the same
guarantees. What do you think?

[Jarin, 2016/02/01 07:42:43]

Atomic (i.e., locked) increment on x86s has a built-in fence. I believe this
should work on x86. I am a bit less sure about the other architectures (e.g.,
simulating arm on ppc), but I think we should still be ok.

       } else {
         UNIMPLEMENTED();
       }
       break;
     case 0x1D:
       if (instr->Opc1Value() == 0x7 && instr->Opc3Value() == 0x1 &&
           instr->Bits(11, 9) == 0x5 && instr->Bits(19, 18) == 0x2) {
         if (instr->SzValue() == 0x1) {
           int vm = instr->VFPMRegValue(kDoublePrecision);
           int vd = instr->VFPDRegValue(kDoublePrecision);
@@ skipping 298 matching lines @@
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 
 #endif  // V8_TARGET_ARCH_ARM