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Side by Side Diff: unittest/AssemblerX8664/LowLevel.cpp

Issue 1616103002: Subzero. X8664. Enables RIP-based addressing mode. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: make presubmit happy. Created 4 years, 11 months ago
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1 //===- subzero/unittest/AssemblerX8664/LowLevel.cpp -----------------------===// 1 //===- subzero/unittest/AssemblerX8664/LowLevel.cpp -----------------------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 #include "AssemblerX8664/TestUtil.h" 9 #include "AssemblerX8664/TestUtil.h"
10 10
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180 reset(); \ 180 reset(); \
181 } while (0) 181 } while (0)
182 182
183 #define TestRegAbsoluteAddr(Inst, Dst, Disp, OpType, ByteCountUntyped, ...) \ 183 #define TestRegAbsoluteAddr(Inst, Dst, Disp, OpType, ByteCountUntyped, ...) \
184 do { \ 184 do { \
185 static constexpr char TestString[] = \ 185 static constexpr char TestString[] = \
186 "(" #Inst ", " #Dst ", " #Disp ", " #OpType ", " #ByteCountUntyped \ 186 "(" #Inst ", " #Dst ", " #Disp ", " #OpType ", " #ByteCountUntyped \
187 ", " #__VA_ARGS__ ")"; \ 187 ", " #__VA_ARGS__ ")"; \
188 static constexpr uint8_t ByteCount = ByteCountUntyped; \ 188 static constexpr uint8_t ByteCount = ByteCountUntyped; \
189 __ Inst(IceType_##OpType, Encoded_GPR_##Dst(), \ 189 __ Inst(IceType_##OpType, Encoded_GPR_##Dst(), \
190 Address(Disp, AssemblerFixup::NoFixup)); \ 190 Address::RipRelative(Disp, AssemblerFixup::NoFixup)); \
191 ASSERT_EQ(ByteCount, codeBytesSize()) << TestString; \ 191 ASSERT_EQ(ByteCount, codeBytesSize()) << TestString; \
192 ASSERT_TRUE(verifyBytes<ByteCount>(codeBytes(), __VA_ARGS__)) \ 192 ASSERT_TRUE(verifyBytes<ByteCount>(codeBytes(), __VA_ARGS__)) \
193 << TestString; \ 193 << TestString; \
194 reset(); \ 194 reset(); \
195 } while (0) 195 } while (0)
196 196
197 #define TestRegAddrBase(Inst, Dst, Base, Disp, OpType, ByteCountUntyped, ...) \ 197 #define TestRegAddrBase(Inst, Dst, Base, Disp, OpType, ByteCountUntyped, ...) \
198 do { \ 198 do { \
199 static constexpr char TestString[] = \ 199 static constexpr char TestString[] = \
200 "(" #Inst ", " #Dst ", " #Base ", " #Disp ", " #OpType \ 200 "(" #Inst ", " #Dst ", " #Base ", " #Disp ", " #OpType \
(...skipping 206 matching lines...) Expand 10 before | Expand all | Expand 10 after
407 TestRegImm(cmp, r8, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xF8, 0x00, 0x01); 407 TestRegImm(cmp, r8, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xF8, 0x00, 0x01);
408 TestRegImm(cmp, r9, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xF9, 0x00, 0x01); 408 TestRegImm(cmp, r9, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xF9, 0x00, 0x01);
409 TestRegImm(cmp, r10, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFA, 0x00, 0x01); 409 TestRegImm(cmp, r10, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFA, 0x00, 0x01);
410 TestRegImm(cmp, r11, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFB, 0x00, 0x01); 410 TestRegImm(cmp, r11, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFB, 0x00, 0x01);
411 TestRegImm(cmp, r12, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFC, 0x00, 0x01); 411 TestRegImm(cmp, r12, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFC, 0x00, 0x01);
412 TestRegImm(cmp, r13, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFD, 0x00, 0x01); 412 TestRegImm(cmp, r13, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFD, 0x00, 0x01);
413 TestRegImm(cmp, r14, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFE, 0x00, 0x01); 413 TestRegImm(cmp, r14, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFE, 0x00, 0x01);
414 TestRegImm(cmp, r15, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFF, 0x00, 0x01); 414 TestRegImm(cmp, r15, 0x100, i16, 6, 0x66, 0x41, 0x81, 0xFF, 0x00, 0x01);
415 415
416 /* cmp GPR, Absolute */ 416 /* cmp GPR, Absolute */
417 TestRegAbsoluteAddr(cmp, eax, 0xF00FBEEF, i32, 8, 0x67, 0x3B, 0x04, 0x25, 417 TestRegAbsoluteAddr(cmp, eax, 0xF00FBEEF, i32, 7, 0x67, 0x3B, 0x05, 0xEF,
418 0xBE, 0x0F, 0xF0);
419 TestRegAbsoluteAddr(cmp, eax, 0xF00FBEEF, i16, 8, 0x66, 0x67, 0x3B, 0x05,
418 0xEF, 0xBE, 0x0F, 0xF0); 420 0xEF, 0xBE, 0x0F, 0xF0);
419 TestRegAbsoluteAddr(cmp, eax, 0xF00FBEEF, i16, 9, 0x66, 0x67, 0x3B, 0x04, 421 TestRegAbsoluteAddr(cmp, eax, 0xF00FBEEF, i8, 7, 0x67, 0x3A, 0x05, 0xEF, 0xBE,
420 0x25, 0xEF, 0xBE, 0x0F, 0xF0); 422 0x0F, 0xF0);
421 TestRegAbsoluteAddr(cmp, eax, 0xF00FBEEF, i8, 8, 0x67, 0x3A, 0x04, 0x25, 0xEF, 423 TestRegAbsoluteAddr(cmp, r8, 0xF00FBEEF, i32, 8, 0x67, 0x44, 0x3B, 0x05, 0xEF,
422 0xBE, 0x0F, 0xF0); 424 0xBE, 0x0F, 0xF0);
423 TestRegAbsoluteAddr(cmp, r8, 0xF00FBEEF, i32, 9, 0x67, 0x44, 0x3B, 0x04, 0x25, 425 TestRegAbsoluteAddr(cmp, r8, 0xF00FBEEF, i16, 9, 0x66, 0x67, 0x44, 0x3B, 0x05,
424 0xEF, 0xBE, 0x0F, 0xF0); 426 0xEF, 0xBE, 0x0F, 0xF0);
425 TestRegAbsoluteAddr(cmp, r8, 0xF00FBEEF, i16, 10, 0x66, 0x67, 0x44, 0x3B, 427 TestRegAbsoluteAddr(cmp, r8, 0xF00FBEEF, i8, 8, 0x67, 0x44, 0x3A, 0x05, 0xEF,
426 0x04, 0x25, 0xEF, 0xBE, 0x0F, 0xF0); 428 0xBE, 0x0F, 0xF0);
427 TestRegAbsoluteAddr(cmp, r8, 0xF00FBEEF, i8, 9, 0x67, 0x44, 0x3A, 0x04, 0x25,
428 0xEF, 0xBE, 0x0F, 0xF0);
429 429
430 /* cmp GPR, 0(Base) */ 430 /* cmp GPR, 0(Base) */
431 TestRegAddrBase(cmp, eax, ecx, 0, i32, 3, 0x67, 0x3B, 0x01); 431 TestRegAddrBase(cmp, eax, ecx, 0, i32, 3, 0x67, 0x3B, 0x01);
432 TestRegAddrBase(cmp, ecx, edx, 0, i32, 3, 0x67, 0x3B, 0x0A); 432 TestRegAddrBase(cmp, ecx, edx, 0, i32, 3, 0x67, 0x3B, 0x0A);
433 TestRegAddrBase(cmp, edx, ebx, 0, i32, 3, 0x67, 0x3B, 0x13); 433 TestRegAddrBase(cmp, edx, ebx, 0, i32, 3, 0x67, 0x3B, 0x13);
434 TestRegAddrBase(cmp, ebx, esp, 0, i32, 4, 0x67, 0x3B, 0x1C, 0x24); 434 TestRegAddrBase(cmp, ebx, esp, 0, i32, 4, 0x67, 0x3B, 0x1C, 0x24);
435 TestRegAddrBase(cmp, esp, ebp, 0, i32, 4, 0x67, 0x3B, 0x65, 0x00); 435 TestRegAddrBase(cmp, esp, ebp, 0, i32, 4, 0x67, 0x3B, 0x65, 0x00);
436 TestRegAddrBase(cmp, ebp, esi, 0, i32, 3, 0x67, 0x3B, 0x2E); 436 TestRegAddrBase(cmp, ebp, esi, 0, i32, 3, 0x67, 0x3B, 0x2E);
437 TestRegAddrBase(cmp, esi, edi, 0, i32, 3, 0x67, 0x3B, 0x37); 437 TestRegAddrBase(cmp, esi, edi, 0, i32, 3, 0x67, 0x3B, 0x37);
438 TestRegAddrBase(cmp, edi, r8, 0, i32, 4, 0x67, 0x41, 0x3B, 0x38); 438 TestRegAddrBase(cmp, edi, r8, 0, i32, 4, 0x67, 0x41, 0x3B, 0x38);
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1133 EXPECT_FLOAT_EQ(1.0f, test.contentsOfDword<float>(S0)); 1133 EXPECT_FLOAT_EQ(1.0f, test.contentsOfDword<float>(S0));
1134 EXPECT_FLOAT_EQ(2.0f, test.contentsOfDword<float>(S1)); 1134 EXPECT_FLOAT_EQ(2.0f, test.contentsOfDword<float>(S1));
1135 EXPECT_FLOAT_EQ(3.0f, test.contentsOfDword<float>(S2)); 1135 EXPECT_FLOAT_EQ(3.0f, test.contentsOfDword<float>(S2));
1136 EXPECT_FLOAT_EQ(4.0f, test.contentsOfDword<float>(S3)); 1136 EXPECT_FLOAT_EQ(4.0f, test.contentsOfDword<float>(S3));
1137 } 1137 }
1138 1138
1139 } // end of anonymous namespace 1139 } // end of anonymous namespace
1140 } // end of namespace Test 1140 } // end of namespace Test
1141 } // end of namespace X8664 1141 } // end of namespace X8664
1142 } // end of namespace Ice 1142 } // end of namespace Ice
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