Subzero. X8664. Enables RIP-based addressing mode.

src/IceInstX8664.cpp

 //===- subzero/src/IceInstX8664.cpp - X86-64 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 117 matching lines @@
   } else if (getOffset() == nullptr && Disp != 0) {
     Str << Disp;
   } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) {
     if (Base == nullptr || CI->getValue() || Disp != 0)
       // Emit a non-zero offset without a leading '$'.
       Str << CI->getValue() + Disp;
   } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) {
     // TODO(sehr): ConstantRelocatable still needs updating for
     // rematerializable base/index and Disp.
     assert(Disp == 0);
+    if (Base == nullptr && Index == nullptr && NeedSandboxing) {
+      llvm::report_fatal_error(
+          "llvm-mc encodes rip-relative instructions incorrectly. Why?");
+      // Native code should be fine. The relocatable will be emitted with a
+      // regular, absolute relocation.
+    }
     const bool UseNonsfi = Func->getContext()->getFlags().getUseNonsfi();
+    assert(!UseNonsfi);
     CR->emitWithoutPrefix(Func->getTarget(), UseNonsfi ? "@GOTOFF" : "");
   } else {
     llvm_unreachable("Invalid offset type for x86 mem operand");
   }
 
   if (Base == nullptr && Index == nullptr) {
     return;
   }
 
   Str << "(";
@@ skipping 100 matching lines @@
   }
   if (getIndex() != nullptr) {
     assert(!getIndex()->isRematerializable());
   }
 
   AssemblerFixup *Fixup = nullptr;
   // Determine the offset (is it relocatable?)
   if (getOffset() != nullptr) {
     if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
       Disp += static_cast<int32_t>(CI->getValue());
-    } else if (const auto CR =
+    } else if (const auto *CR =
                    llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
-      Disp = CR->getOffset();
-      Fixup = Asm->createFixup(FK_Abs, CR);
+      const auto FixupKind =
+          (getBase() != nullptr || getIndex() != nullptr) ? FK_Abs : FK_PcRel;
+      Disp = CR->getOffset() - (FixupKind == FK_PcRel ? 4 : 0);
+      Fixup = Asm->createFixup(FixupKind, CR);
     } else {
       llvm_unreachable("Unexpected offset type");
     }
   }
 
   // Now convert to the various possible forms.
   if (getBase() && getIndex()) {
     const bool NeedSandboxing = Target->needSandboxing();
     (void)NeedSandboxing;
     assert(!NeedSandboxing || IsLeaAddr ||
@@ skipping 10 matching lines @@
     return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()), Disp,
                                   Fixup);
   }
 
   if (getIndex()) {
     return X8664::Traits::Address(getEncodedGPR(getIndex()->getRegNum()),
                                   X8664::Traits::ScaleFactor(getShift()), Disp,
                                   Fixup);
   }
 
-  return X8664::Traits::Address(Disp, Fixup);
+  return X8664::Traits::Address::RipRelative(Disp, Fixup);
 }
 
 TargetX8664Traits::Address
 TargetX8664Traits::VariableSplit::toAsmAddress(const Cfg *Func) const {
   assert(!Var->hasReg());
   const ::Ice::TargetLowering *Target = Func->getTarget();
   int32_t Offset = Var->getStackOffset() + getOffset();
   return X8664::Traits::Address(getEncodedGPR(Target->getFrameOrStackReg()),
                                 Offset, AssemblerFixup::NoFixup);
 }
@@ skipping 29 matching lines @@
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // namespace X8664
 } // end of namespace Ice
 
 X86INSTS_DEFINE_STATIC_DATA(X8664, X8664::Traits)