Changes to run "Hello, world!" on MIPS hardware.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 44 matching lines @@
 
   // Save current Context pointer into Isolate structure.
   __ sw(CTX, Address(A0, Isolate::top_context_offset()));
 
   // Cache Isolate pointer into CTX while executing runtime code.
   __ mov(CTX, A0);
 
   // Reserve space for arguments and align frame before entering C++ world.
   // NativeArguments are passed in registers.
   ASSERT(sizeof(NativeArguments) == 4 * kWordSize);
-  __ ReserveAlignedFrameSpace(0);
+  __ ReserveAlignedFrameSpace(4 * kWordSize);  // Reserve space for arguments.
 
   // Pass NativeArguments structure by value and call runtime.
   // Registers A0, A1, A2, and A3 are used.
 
   ASSERT(isolate_offset == 0 * kWordSize);
   // Set isolate in NativeArgs: A0 already contains CTX.
 
   // There are no runtime calls to closures, so we do not need to set the tag
   // bits kClosureFunctionBit and kInstanceFunctionBit in argc_tag_.
   ASSERT(argc_tag_offset == 1 * kWordSize);
@@ skipping 78 matching lines @@
   // Save exit frame information to enable stack walking as we are about
   // to transition to native code.
   __ sw(SP, Address(A0, Isolate::top_exit_frame_info_offset()));
 
   // Save current Context pointer into Isolate structure.
   __ sw(CTX, Address(A0, Isolate::top_context_offset()));
 
   // Cache Isolate pointer into CTX while executing native code.
   __ mov(CTX, A0);
 
-  // Reserve space for the native arguments structure passed on the stack (the
-  // outgoing pointer parameter to the native arguments structure is passed in
-  // R0) and align frame before entering the C++ world.
-  __ ReserveAlignedFrameSpace(sizeof(NativeArguments));
-
   // Initialize NativeArguments structure and call native function.
   // Registers A0, A1, A2, and A3 are used.
 
   ASSERT(isolate_offset == 0 * kWordSize);
   // Set isolate in NativeArgs: A0 already contains CTX.
 
   // There are no native calls to closures, so we do not need to set the tag
   // bits kClosureFunctionBit and kInstanceFunctionBit in argc_tag_.
   ASSERT(argc_tag_offset == 1 * kWordSize);
   // Set argc in NativeArguments: T1 already contains argc.
 
   ASSERT(argv_offset == 2 * kWordSize);
   // Set argv in NativeArguments: T2 already contains argv.
 
   ASSERT(retval_offset == 3 * kWordSize);
   __ addiu(A3, FP, Immediate(2 * kWordSize));  // Set retval in NativeArgs.
 
   // TODO(regis): Should we pass the structure by value as in runtime calls?
   // It would require changing Dart API for native functions.
   // For now, space is reserved on the stack and we pass a pointer to it.
   __ addiu(SP, SP, Immediate(-4 * kWordSize));
   __ sw(A3, Address(SP, 3 * kWordSize));
   __ sw(A2, Address(SP, 2 * kWordSize));
   __ sw(A1, Address(SP, 1 * kWordSize));
   __ sw(A0, Address(SP, 0 * kWordSize));
+  __ mov(A0, SP);  // Pass the pointer to the NativeArguments.
+
+  __ ReserveAlignedFrameSpace(kWordSize);  // Just passing A0.
 
   // Call native function or redirection via simulator.
   __ jalr(T5);
-  __ delay_slot()->mov(A0, SP);  // Pass the pointer to the NativeArguments.
   __ TraceSimMsg("CallNativeCFunctionStub return");
 
   // Reset exit frame information in Isolate structure.
   __ sw(ZR, Address(CTX, Isolate::top_exit_frame_info_offset()));
 
   // Load Context pointer from Isolate structure into A2.
   __ lw(A2, Address(CTX, Isolate::top_context_offset()));
 
   // Reload NULLREG.
   __ LoadImmediate(NULLREG, reinterpret_cast<intptr_t>(Object::null()));
@@ skipping 1263 matching lines @@
     // but only at exit so that we have collected all type feedback before
     // optimizing.
   }
   __ addiu(T1, T1, Immediate(1));
   __ sw(T1, FieldAddress(func_reg, Function::usage_counter_offset()));
   __ Bind(&is_hot);
 }
 
 
 // Generate inline cache check for 'num_args'.
-//  AR: return address
+//  RA: return address
 //  S5: Inline cache data object.
 //  S4: Arguments descriptor array.
 // Control flow:
 // - If receiver is null -> jump to IC miss.
 // - If receiver is Smi -> load Smi class.
 // - If receiver is not-Smi -> load receiver's class.
 // - Check if 'num_args' (including receiver) match any IC data group.
 // - Match found -> jump to target.
 // - Match not found -> jump to IC miss.
 void StubCode::GenerateNArgsCheckInlineCacheStub(Assembler* assembler,
@@ skipping 673 matching lines @@
   __ mov(TMP1, ZR);
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ lw(T1, Address(SP, 1 * kWordSize));
   __ Ret();
   __ delay_slot()->addiu(SP, SP, Immediate(2 * kWordSize));
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS