Subzero: Make -reg-use and -reg-exclude specific to register class.

src/IceRegAlloc.cpp

 //===- subzero/src/IceRegAlloc.cpp - Linear-scan implementation -----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 667 matching lines @@
   for (SizeT i = MinWeightIndex + 1; i < Iter.Weights.size(); ++i) {
     if (Iter.RegMask[i] && Iter.Weights[i] < Iter.Weights[MinWeightIndex])
       MinWeightIndex = i;
   }
 
   if (Iter.Cur->getWeight(Func) <= Iter.Weights[MinWeightIndex]) {
     // Cur doesn't have priority over any other live ranges, so don't allocate
     // any register to it, and move it to the Handled state.
     Handled.push_back(Iter.Cur);
     if (Iter.Cur->mustHaveReg()) {
-      if (Kind == RAK_Phi)
+      if (Kind == RAK_Phi) {
         addSpillFill(Iter);
-      else
+      } else {
+        dumpLiveRangeTrace("Failing      ", Iter.Cur);
         Func->setError("Unable to find a physical register for an "
-                       "infinite-weight live range");
+                       "infinite-weight live range: " +
+                       Iter.Cur->getName(Func));
+      }
     }
   } else {
     // Evict all live ranges in Active that register number MinWeightIndex is
     // assigned to.
     const llvm::SmallBitVector &Aliases = *RegAliases[MinWeightIndex];
     for (SizeT I = Active.size(); I > 0; --I) {
       const SizeT Index = I - 1;
       Variable *Item = Active[Index];
       int32_t RegNum = Item->getRegNumTmp();
       if (Aliases[RegNum]) {
@@ skipping 275 matching lines @@
     Str << "\n";
   }
   Str << "++++++ Inactive:\n";
   for (const Variable *Item : Inactive) {
     dumpLiveRange(Item, Func);
     Str << "\n";
   }
 }
 
 } // end of namespace Ice