Add vcvt.s32.f32 instruction to the integrated ARM assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1842 matching lines @@
   Str << "\t"
          "vcvt" << getPredicate() << vcvtVariantSuffix(Variant) << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstARM32Vcvt::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   switch (Variant) {
+  case S2si:
+    Asm->vcvtis(getDest(), getSrc(0), getPredicate());
+    break;
   case S2d:
     Asm->vcvtds(getDest(), getSrc(0), getPredicate());
     break;
   case D2s:
     Asm->vcvtsd(getDest(), getSrc(0), getPredicate());
     break;
   default:
     // TODO(kschimpf): Fill in other variants.
     Asm->setNeedsTextFixup();
     break;
@@ skipping 377 matching lines @@
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace ARM32
 } // end of namespace Ice